FW82801EB Intel, FW82801EB Datasheet - Page 542

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

AC ’97 Audio Controller Registers (D31:F5)
15.1.18
15.1.19
542
INT_PN—Interrupt Pin Register
(Audio—D31:F5)
Address Offset:
Default Value:
Lockable:
This register indicates which PCI interrupt pin is used for the AC '97 module interrupt. The AC '97
interrupt is internally OR’d to the interrupt controller with the PIRQB# signal.
PCID—Programmable Codec Identification Register
(Audio—D31:F5)
Address Offset:
Default Value:
Lockable:
This register is used to specify the ID for the secondary and tertiary codecs for I/O accesses. This
register is not affected by the D3
only before any AC ’97 codec accesses.
Bit
7:3
2:0
Bit
7:4
3:2
1:0
Reserved.
AC '97 Interrupt Routing — RO. Hardwired to 010b to select PIRQB#.
Reserved.
Tertiary Codec ID (TID ) — R/W. These bits define the encoded ID that is used to address the
tertiary codec I/O space. Bit 1 is the first bit sent and Bit 0 is the second bit sent on AC_SDOUT
during slot 0.
Secondary Codec ID (SCID) — R/W. These two bits define the encoded ID that is used to address
the secondary codec I/O space. The two bits are the ID that will be placed on slot 0, bits 0 and 1,
upon an I/O access to the secondary codec. Bit 1 is the first bit sent and bit 0 is the second bit sent
on AC_SDOUT during slot 0.
3Dh
02h
No
40h
09h
No
HOT
to D0 transition. The value in this register must be modified
Description
Description
Intel
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
8 bits
Core
R/W
8 bits
Core