FW82801EB Intel, FW82801EB Datasheet - Page 548

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FW82801EB

Manufacturer Part Number
FW82801EB
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801EB

Lead Free Status / RoHS Status
Not Compliant

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AC ’97 Audio Controller Registers (D31:F5)
548
Table 170. Native Audio Bus Master Control Registers (Sheet 1 of 2)
Offset
0Ah
0Bh
1Ah
1Bh
2Ah
2Bh
2Ch
4Ah
4Bh
5Ah
5Bh
00h
04h
05h
06h
08h
10h
14h
15h
16h
18h
20h
24h
25h
26h
28h
30h
34h
40h
44h
45h
46h
48h
50h
54h
55h
56h
58h
60h
MC2_BDBAR
PO_BDBAR
MC_BDBAR
PI2_BDBAR
GLOB_CNT
GLOB_STA
Mnemonic
PI_BDBAR
MC2_PICB
PO_PICB
MC_PICB
MC2_CIV
PI2_PICB
MC2_PIV
MC2_LVI
MC2_SR
MC2_CR
SP_BAR
PI_PICB
MC_CIV
PO_CIV
PO_PIV
MC_PIV
PI2_CIV
PI2_PIV
MC_LVI
MC_SR
MC_CR
PI2_LVI
PI2_CR
PO_LVI
PO_SR
PO_CR
PI2_SR
PI_CIV
PI_PIV
PI_LVI
PI_SR
PI_CR
CAS
PCM In Buffer Descriptor list Base Address
PCM In Current Index Value
PCM In Last Valid Index
PCM In Status
PCM In Position in Current Buffer
PCM In Prefetched Index Value
PCM In Control
PCM Out Buffer Descriptor list Base
Address
PCM Out Current Index Value
PCM Out Last Valid Index
PCM Out Status
PCM In Position In Current Buffer
PCM Out Prefetched Index Value
PCM Out Control
Mic. In Buffer Descriptor List Base Address
Mic. In Current Index Value
Mic. In Last Valid Index
Mic. In Status
Mic. In Position In Current Buffer
Mic. In Prefetched Index Value
Mic. In Control
Global Control
Global Status
Codec Access Semaphore
Mic. 2 Buffer Descriptor List Base Address
Mic. 2 Current Index Value
Mic. 2 Last Valid Index
Mic. 2 Status
Mic 2 Position In Current Buffer
Mic. 2 Prefetched Index Value
Mic. 2 Control
PCM In 2 Buffer Descriptor List Base
Address
PCM In 2 Current Index Value
PCM In 2 Last Valid Index
PCM In 2 Status
PCM In 2 Position in Current Buffer
PCM In 2 Prefetched Index Value
PCM In 2 Control
S/PDIF Buffer Descriptor List Base Address
Name
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
00000000h
00000000h
00000000h
00000000h
00700000h
00000000h
00000000h
00000000h
Default
0001h
0000h
0000h
0001h
0000h
0001h
0000h
0000h
0001h
0001h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
R/W, R/W (special)
R/W, R/W (special)
R/W, R/W (special)
R/W, R/W (special)
R/W, R/W (special)
R/W, R/W (special)
R/W, R/WC, RO
R/W (special)
R/WC, RO
R/WC, RO
R/WC, RO
R/WC, RO
RO, RWC
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO

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