FW82801EB Intel, FW82801EB Datasheet - Page 641

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Intel
®
Table 204. Intel
82801EB ICH5 / 82801ER ICH5R Datasheet
Prefetchable Memory Limit
I/O Base Upper 16 Bits
I/O Limit Upper 16 Bits
Interrupt Line
Bridge Control
Hub Interface 1 Command
Control
Secondary PCI Device
Hiding
Policy Configuration
Register
Multi-Transaction Timer
PCI Master Status
Error Command Register
Error Status Register
Vendor ID
Device ID
PCI Command Register
PCI Device Status Register
Revision ID
Programming Interface
Sub Class Code
Base Class Code
Header Type
ACPI Base Address
Register
ACPI Control
BIOS Control Register
®
Register Name
ICH5 PCI Configuration Registers (Sheet 3 of 11)
3E – 3Fh
4E – 4Fh
26 – 27h
30 – 31h
32 – 33h
40 – 43h
44 – 45h
50 – 53h
00 – 01h
02 – 03h
04 – 05h
06 – 07h
40 – 43h
Offset
3Ch
0Ah
0Bh
0Eh
70h
82h
90h
92h
08h
09h
44h
LPC Bridge D31:F0
Section 8.1.20, “PREF_MEM_MLT—Prefetchable Memory Limit
Register (HUB-PCI—D30:F0)” on page 310
Section 8.1.21, “IOBASE_HI—I/O Base Upper 16 Bits Register
(HUB-PCI—D30:F0)” on page 310
Section 8.1.22, “IOLIM_HI—I/O Limit Upper 16 Bits Register
(HUB-PCI—D30:F0)” on page 310
Section 8.1.23, “INT_LN—Interrupt Line Register (HUB-PCI—
D30:F0)” on page 310
Section 8.1.24, “BRIDGE_CNT—Bridge Control Register (HUB-
PCI—D30:F0)” on page 311
Section 8.1.25, “HI1_CMD—Hub Interface 1 Command Control
Register (HUB-PCI—D30:F0)” on page 312
Section 8.1.26, “DEVICE_HIDE—Secondary PCI Device Hiding
Register (HUB-PCI—D30:F0)” on page 313
Section 8.1.27, “CNF—Policy Configuration Register (HUB-
PCI—D30:F0)” on page 314
Section 8.1.28, “MTT—Multi-Transaction Timer Register (HUB-
PCI—D30:F0)” on page 315
Section 8.1.29, “PCI_MAST_STS—PCI Master Status Register
(HUB-PCI—D30:F0)” on page 315
Section 8.1.30, “ERR_CMD—Error Command Register (HUB-
PCI—D30:F0)” on page 316
Section 8.1.31, “ERR_STS—Error Status Register (HUB-PCI—
D30:F0)” on page 316
Section 9.1.1, “VID—Vendor Identification Register (LPC I/F—
D31:F0)” on page 318
Section 9.1.2, “DID—Device Identification Register (LPC I/F—
D31:F0)” on page 318
Section 9.1.3, “PCICMD—PCI COMMAND Register (LPC I/F—
D31:F0)” on page 319
Section 9.1.4, “PCISTS—PCI Status Register (LPC I/F—
D31:F0)” on page 320
Section 9.1.6, “PI—Programming Interface Register (LPC I/F—
D31:F0)” on page 321
Section 9.1.6, “PI—Programming Interface Register (LPC I/F—
D31:F0)” on page 321
Section 9.1.7, “SCC—Sub Class Code Register (LPC I/F—
D31:F0)” on page 321
Section 9.1.8, “BCC—Base Class Code Register (LPC I/F—
D31:F0)” on page 321
Section 9.1.9, “HEADTYP—Header Type Register (LPC I/F—
D31:F0)” on page 322
Section 9.1.10, “PMBASE—ACPI Base Address Register (LPC
I/F—D31:F0)” on page 322
Section 9.1.11, “ACPI_CNTL—ACPI Control Register (LPC I/F
— D31:F0)” on page 323
Section 9.1.13, “TCO_CNTL — TCO Control Register (LPC I/F
— D31:F0)” on page 324
Datasheet Section and Location
Register Index
641