FW82801EB Intel, FW82801EB Datasheet - Page 667

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Overall Enable
Overcurrent Active
Overcurrent Change
Overcurrent Indicator
OWNER_CNT
P
Parity Error Response
Parity Error Response Enable
Pass Through State
PCI Interrupt Enable
PCI Master Request Status
PCI Parity Inversion State
PCI SERR# Enable
PCISML_SCLI
PCISML_SCLO
PCISML_SDAI
PCISML_SDAO
PCISML_SGNT
PCISML_SREQ
PCM 4/6 Enable
PCM In 1, Microphone In 1 Data In Line
PCM In 2 Interrupt
PCM In 2, Microphone In 2 Data In Line
PCM In Interrupt
PCM Out Interrupt
PCM Out Mode
PEC_DATA
PEC_EN
Periodic Interrupt Capable
Periodic Interrupt Enable
Periodic Interrupt Flag
Periodic List Execution
Periodic Schedule Enable
Periodic Schedule Status
Periodic SMI# Rate Select
PERIODIC_EN
PERIODIC_STS
PIRQAE_ACT_STS
PIRQBF_ACT_STS
PIRQCG_ACT_STS
PIRQDH_ACT_STS
PM1_STS_REG
PME Clock
PME Enable
PME Status
PME Support
PME_B0_EN
PME_B0_STS
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
462, 481, 516, 535, 561
523
284, 448, 487, 544, 567
285, 296, 449, 488, 545, 567
526
285, 449, 488, 567
284, 448, 487, 544, 567
394
392
581
512
298
298
554
396
298
298
554
399
298
298
398
557, 577
557, 577
556, 576
477, 510
469
373
510
401
468
401
401
401
477
277, 303, 319, 417, 435,
372
216
502
371
500
316
583
377
315
311
558
558
PME_EN
PME_STS
Pointer Field
Poll Mode Command
POP_MODE_CAP
POP_MODE_SEL
Port 0 BIST FIS Initiate
Port 0 Enabled
Port 0 Present
Port 1 BIST FIS Initiate
Port 1 Enabled
Port 1 Present
Port Change Detect
Port Change Interrupt Enable
Port Enable/Disable Change
Port Enabled/Disabled
PORT Function Selection
Port Owner
Port Power
Port Reset
Port Test Control
Port Wake Implemented
Port Wake Up Capability Mask
PORT0EN
PORT1EN
Position In Current Buffer (15-0)
Positive Decode Enable
Postable Memory Write Enable
Power Button Enable
Power Button Override Status
Power Button Status
Power Failure
Power Management Capability ID
Power Management Data
Power Management Event Enable
Power Sequencing
Power State
PRD Interrupt Status
Prefetch Flush Enable
Prefetchable
Prefetchable Memory Address Base
Prefetchable Memory Address Limit
Prefetched Index Value (4-0)
PRIM_SIG_MODE
Primary Bus Number
Primary Discard Timer
Primary Drive 0 Base Clock
Primary Drive 0 Cycle Time
Primary Drive 0 Synchronous DMA Mode Enable
481, 516
395
477, 509
392
470
470
509
509
285, 449, 488, 545, 567
281, 484
291
451
451
379
451
451
509
617
419, 437
419, 437
503
429, 447
387
458
388
306
360
314
478, 511
311
331
454
454
491
286
291
478, 510
430, 448
428, 446
552, 573
504
386
319, 417, 435, 462,
491
552
545
486
309
310
667