SCD128410QCE Intel, SCD128410QCE Datasheet - Page 91
SCD128410QCE
Manufacturer Part Number
SCD128410QCE
Description
Manufacturer
Intel
Datasheet
1.SCD128410QCE.pdf
(176 pages)
Specifications of SCD128410QCE
Pin Count
100
Lead Free Status / RoHS Status
Not Compliant
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This procedure is also used as part of a diagnostic test suite. The device completes internal
initialization within 500 sec. A timer (software or hardware) detects when the operation is not
completed within that time and cues if the device is functional.
Internal firmware uses this operation to flag completion of the reset procedure. After the reset
is issued, the GFRCR is one of the first registers cleared and it is the last one set before normal
runtime code execution begins. The initialization routine must wait for this register to become
non-zero before it begins any other programming of CD1284 registers. If the CPU is
sufficiently fast, it could begin testing the GFRCR before the MPU clears it. The assumption
could be made that the CD1284 has completed internal initialization when, in fact, it has not
even started. To avoid this error, the CPU should look for the GFRCR to change to ‘0.’ It
should then look to the current revision code. Alternatively, the CPU can clear the GFRCR just
prior to issuing the global reset command and then poll for the correct revision code. This is
useful in slow systems that cannot guarantee that the CPU can check the register after it is
cleared or before it is loaded with the revision code.
IEEE 1284-Compatible Parallel Interface Controller — CD1284
91
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