ISP1160BM,518 NXP Semiconductors, ISP1160BM,518 Datasheet - Page 32
ISP1160BM,518
Manufacturer Part Number
ISP1160BM,518
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1160BM518.pdf
(87 pages)
Specifications of ISP1160BM,518
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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ISP1160-01_7
Product data sheet
Fig 26. Using an internal OC detection circuit.
’n’ represents the downstream port number (n = 1 or 2).
V OC = + 5 V − V BUS
V BUS
9.8.1 Using an internal OC detection circuit
downstream
+ 5 V
connector
The internal OC detection circuit can be used only when V
5 V power supply. The HCD must set AnalogOCEnable, bit 10 of the
HcHardwareConfiguration register, to logic 1.
An application using the internal OC detection circuit and internal 15 kΩ pull-down
resistors is shown in
and DownstreamPort15Kresistorsel to logic 1. They are bit 10 and bit 12 of the
HcHardwareConfiguration register, respectively.
When H_OCn_N detects an overcurrent status on a downstream port, H_PSWn_N will
output HIGH, a logic 1 to turn off the 5 V power supply to the downstream port V
When there is no such detection, H_PSWn_N will output LOW, a logic 0 to turn on the 5 V
power supply to the downstream port V
In general applications, a P-channel MOSFET can be used as the power switch for V
Connect the 5 V power supply to the source of the P-channel MOSFET, V
and H_PSWn_N to the gate. Call the voltage drop across the drain and source, the
overcurrent detection voltage (V
voltage comparator has been designed-in, with a nominal voltage threshold (ΔV
75 mV. When V
the P-channel MOSFET. If the P-channel MOSFET has a R
overcurrent threshold will be 500 mA. The selection of a P-channel MOSFET with a
different R
USB
port
DSon
P-Channel
MOSFET
will result in a different overcurrent threshold.
OC
exceeds V
Rev. 07 — 29 September 2009
Figure
47 pF
(2×)
H_PSWn_N
22 Ω
22 Ω
H_OCn_N
V CC
H_DMn
H_DPn
26. In this example, the HCD must set both AnalogOCEnable
trip
, H_PSWn_N will output a HIGH level, logic 1 to turn off
OC
). For the internal overcurrent detection circuit, a
OC detect
regulator
BUS
≥
.
15 kΩ
(2×)
bit 12
Configuration
HcHardware
ATX
OC select
1
0 Reg
PSW
C/L
Embedded USB host controller
CC
HC CORE
DSon
ISP1160/01
(pin 56) is connected to a
SIE
Configuration
of 150 mΩ, the
HcHardware
ISP1160/01
© ST-ERICSSON 2009. All rights reserved.
bit 10
BUS
004aaa066
to the drain,
trip
BUS
) of
32 of 87
.
BUS
.
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