ICE3PCS01G Infineon Technologies, ICE3PCS01G Datasheet - Page 12

• Manufacturer Part Number: ICE3PCS01G
• Description: Power Factor Correction ICs STANDALONE PFC CTRLR IN CCM
• Manufacturer: Infineon Technologies

Specifications of ICE3PCS01G

• Lead Free Status / RoHS Status: Supplier Unconfirmed

The nonlinear gain block controls the amplitude of the
regulated inductor current. The input of this block is the
output voltage of integrated PI compensator. This block
has been designed to reduce the voltage loop
dependency on the input voltage in order to support the
wide input voltage range (85VAC-265VAC). Figure 7
gives the relative output power transfer curve versus
the digital word from the integrated PI compensator.
The output power at the input voltage of 85VAC and
maximum digital word of 256 from PI compensator is
set as the normative power and the power curves at
different input voltage present the relative power to the
normative one.
Figure 7
3.6
The choke current is sensed through the voltage
across the shunt resistor and averaged by the ICOMP
pin capacitor so that the IC can control the choke
current to track the instant variation of the input voltage.
3.6.1
The complete system current loop is shown in Figure 8.
It consists of the current loop block which averages the
voltage at ISENSE pin resulted from the inductor
current flowing across R
is compared with an internal ramp in the ramp
generator and PWM block. Once the ramp crosses the
average waveform, the comparator C10 turns on the
driver stage through the PWM logic block. The
Nonlinear Gain block defines the amplitude of the
inductor current. The following sections describe the
functionality of each individual blocks.
Version 2.0
10.00000
1.00000
0.10000
0.01000
0.00100
0.00010
0.00001
0
Average Current Control
Complete Current Loop
18
37
55
Power Transfer Curve
73
power at 85V
91
shunt
PI digital output
110
. The averaged waveform
128
146
power at 265V
165
183 201
219
238
256
12
Figure 8
3.6.2
The compensation of the current loop is implemented
at the ICOMP pin. This is OTA6 output and a capacitor
C
Figure 8). Under normal mode of the operation, this pin
gives a voltage which is proportional to the averaged
inductor current. This pin is internally shorted to 5V in
the event of standby mode.
3.6.3
The IC employs an average current control scheme in
continuous mode (CCM) to achieve the power factor
correction. Assuming the loop voltage is working and
output voltage is kept constant, the off duty cycle D
for a CCM PFC system is given as:
D
From the above equation, D
The objective of the current loop is to regulate the
average inductor current such that it is proportional to
the off duty cycle D
V
objective.
C
ICOMP
IN
ICOMP
OFF
Input Voltage
ICOMP
. Figure 9 shows the scheme to achieve the
ISENSE
Rectified
=V
R
has to be installed at this node to ground (see
CS
IN
Current Loop Compensation
Pulse Width Modulation (PWM)
/V
R
L
shunt
Boost
OUT
Current Loop
5.0mS
+/-50uA (linear range)
Compensation
Current Loop
Fault
S2
Complete System Current Loop
OTA6
OFF
5V
Functional Description
, and thus to the input voltage
Q
B
OFF
R
GATE
Inductor current
proportional to
Comparator
is proportional to V
averaged
voltage
PWM
ICE3PCS01G
Nonlinear
C10
Gain
CCM-PFC
5 May 2010
Driver
GATE
Gate
D
PWM Logic
B
R
S
C
Voltage Loop
B
Input From
Q
IN
OFF
.