MC9S08GT60ACFDE Freescale, MC9S08GT60ACFDE Datasheet - Page 57
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MC9S08GT60ACFDE
Manufacturer Part Number
MC9S08GT60ACFDE
Description
Manufacturer
Freescale
Datasheet
1.MC9S08GT60ACFDE.pdf
(302 pages)
Specifications of MC9S08GT60ACFDE
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
4KB
# I/os (max)
39
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8/2.08V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Program Memory Type
Flash
Program Memory Size
60KB
Lead Free Status / RoHS Status
Compliant
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The security key can be written only from RAM, so it cannot be entered through background commands
without the cooperation of a secure user program. The flash memory cannot be accessed by read operations
while KEYACC is set.
The backdoor comparison key (NVBACKKEY through NVBACKKEY+7) is located in flash memory
locations in the nonvolatile register space so users can program these locations just as they would program
any other flash memory location. The nonvolatile registers are in the same 512-byte block of flash as the
reset and interrupt vectors, so block protecting that space also block protects the backdoor comparison key.
Block protects cannot be changed from user application programs, so if the vector space is block protected,
the backdoor security key mechanism cannot permanently change the block protect, security settings, or
the backdoor key.
Security can always be disengaged through the background debug interface by performing these steps:
4.6
The flash module has nine 8-bit registers in the high-page register space, three locations in the nonvolatile
register space in flash memory that are copied into three corresponding high-page control registers at reset.
There is also an 8-byte comparison key in flash memory. Refer to
address assignments for all flash registers. This section refers to registers and control bits only by their
names. A Freescale-provided equate or header file normally is used to translate these names into the
appropriate absolute addresses.
4.6.1
Bit 7 of this register is a read-only status flag. Bits 6 through 0 may be read at any time but can be written
only one time. Before any erase or programming operations are possible, write to this register to set the
frequency of the clock for the nonvolatile memory system within acceptable limits.
Freescale Semiconductor
2. Writing the user-entered key values to the NVBACKKEY through NVBACKKEY+7 locations.
3. Writing 0 to KEYACC in the FCNFG register. If the 8-byte key that was just written matches the
1. Disable any block protections by writing FPROT. FPROT can be written only with background
2. Mass erase flash, if necessary.
3. Blank check flash. Provided flash is completely erased, security is disengaged until the next reset.
These writes must be done in order, starting with the value for NVBACKKEY and ending with
NVBACKKEY+7. STHX should not be used for these writes because these writes cannot be done
on adjacent bus cycles. User software normally would get the key codes from outside the MCU
system through a communication interface such as a serial I/O.
key stored in the flash locations, SEC01:SEC00 are automatically changed to 1:0 and security will
be disengaged until the next reset.
debug commands, not from application software.
To avoid returning to secure mode after the next reset, program NVOPT so SEC01:SEC00 = 1:0.
Flash Registers and Control Bits
Flash Clock Divider Register (FCDIV)
MC9S08GB60A Data Sheet, Rev. 2
Table 4-3
and
Table 4-4
for the absolute
Chapter 4 Memory
57
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