MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1203
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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TPU3 ROM Functions
D.19 Read/Write Timers and Pin TPU3 Function (RWTPIN)
The RWTPIN Bank 1 TPU3 function enables the RCPU to read, via locations in PRAM, both the TCR1
and TCR2 timer counters, and than selectively load TCR1 or TCR2 with a RCPU-supplied value contained
in PRAM. The function also allows control of the pin state and direction of the RWTPIN channel.
A pin-state parameter is maintained in PRAM and is updated upon every service request. It can contain a
value of the current pin state whether the pin is programmed as an input or output.
The function also receives links. Upon receipt, it will read the two TCRs into PRAM, updating the
pin-state parameter and generating a maskable interrupt request to the RCPU.
The RCPU can control the channel pin, the TCRs, or both. To control the channel pin only, the ‘read TCR’
option is used and the values returned ignored. Because this function controls the TCRs without affecting
the channel pin, it can run on a TPU3 channel whose pin is controlled by a function running on another
channel (for example, a slave stepper-motor channel). See Freescale TPU Progamming Note Using The
TPU Function Library And TPU Emulation Mode, (TPUPN00/D).
Figure D-30
shows all of the host interface areas for the PTA function.
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
D-51
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