MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 92
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Overview
1.3.3.5
1.3.3.6
1-8
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One queued serial module with one queued SPI and two SCIs (QSMCM)
QSMCM matches full MPC555 QSMCM functionality
Queued SPI
— Provides full-duplex communication port for peripheral expansion or inter-processor
— Up to 32 preprogrammed transfers, reducing overhead
— Synchronous serial interface with baud rate of up to system clock / 4
— Four programmable peripheral-selects signals:
— Supports up to 16 devices with external decoding
— Supports up to eight devices with internal decoding
— Special wrap-around mode allows continuous sampling of a serial peripheral for efficient
SCI
— UART mode provides NRZ format and half- or full-duplex interface
— 16 register receive buffers and 16 register transmit buffers on one SCI
— Advanced error detection and optional parity generation and detection
— Word-length programmable as eight or nine bits
— Separate transmitter and receiver enable bits, and double buffering of data
— Wake-up functions allow the CPU to run uninterrupted until either a true idle line is detected,
Synchronous serial interface between the microprocessor and an external device
Four internal parallel data sources can be multiplexed through the PPM
— TPU3_A: 16 channels
— TPU3_B: 16 channels
— MIOS14: 12 PWM channels, four MDA channels
— Internal GPIO: 16 general-purpose inputs, 16 general-purpose outputs
Software configurable stream size
Software configurable clock (TCLK) based on system clock
Software selectable clock modes (SPI mode and TDM mode)
Software selectable operation modes
— Continuous mode
— Start-transmit-receive (STR) mode
Software configurable internal modules interconnect (shorting)
communication
interfacing to serial analog-to-digital (A/D) converters
or a new address byte is received
Queued Serial Multi-Channel Module (QSMCM)
Peripheral Pin Multiplexing (PPM)
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
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