MC9S12XDP512MAG Freescale, MC9S12XDP512MAG Datasheet - Page 272

• Manufacturer Part Number: MC9S12XDP512MAG
• Manufacturer: Freescale

Specifications of MC9S12XDP512MAG

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(24-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 6 XGATE (S12XGATEV2)
ROR
Operation
n = RS or IMM4
Rotates the bits in register RD n positions to the right. The upper n bits of the register RD are filled with
the lower n bits. Two source forms are available. In the first form, the parameter n is contained in the
instruction code as an immediate operand. In the second form, the parameter is contained in the lower bits
of the source register RS[3:0]. All other bits in RS are ignored. If n is zero no shift will take place and the
register RD will be unaffected; however, the condition code flags will be updated.
CCR Effects
Code and CPU Cycles
272
N:
Z:
V:
C:
ROR RD, #IMM4
ROR RD, RS
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
0; cleared.
Not affected.
Z
V
0
Source Form
—
C
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM4
DYA
Rotate Right
0
0
0
0
n bits
RD
0
0
0
0
1
1
Machine Code
RD
RD
RS
IMM4
1
1
0
Freescale Semiconductor
1
1
ROR
1
1
1
1
Cycles
P
P