MCIMX515DJM8C Freescale, MCIMX515DJM8C Datasheet - Page 7

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MCIMX515DJM8C

Manufacturer Part Number
MCIMX515DJM8C
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX515DJM8C

Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Freescale Semiconductor
(muxed with
Mnemonic
eSDHC-4
GPIO-1
GPIO-2
GPIO-3
GPIO-4
GPU2D
P-ATA)
HS-I
Block
I
I
GPT
GPU
FEC
FIRI
2
2
C-1
C-2
2
C
Enhanced
Multi-Media
Card/
Secure Digital
Host
Controller
Fast Ethernet
Controller
Fast
Infra-Red
Interface
General
Purpose I/O
Modules
General
Purpose
Timer
Graphics
Processing
Unit
Graphics
Processing
Unit-2D Ver. 1
I
Block Name
2
C Interface
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Table 2. i.MX51 Digital and Analog Modules (continued)
Connectivity
Peripherals
Connectivity
Peripherals
Connectivity
Peripherals
System
Control
Peripherals
Timer
Peripherals
Multimedia
Peripherals
Multimedia
Peripherals
Connectivity
Peripherals
Subsystem
Can be configured as eSDHC (see above) and is muxed with the P-ATA
interface.
The Ethernet Media Access Controller (MAC) is designed to support both
10 Mbps and 100 Mbps ethernet/IEEE Std 802.3™ networks. An external
transceiver interface and transceiver function are required to complete the
interface to the media.
Fast Infra-Red Interface
These modules are used for general purpose input/output to external ICs. Each
GPIO module supports up to 32 bits of I/O.
Each GPT is a 32-bit “free-running” or “set and forget” mode timer with a
programmable prescaler and compare and capture register. A timer counter
value can be captured using an external event, and can be configured to trigger
a capture event on either the leading or trailing edges of an input pulse. When
the timer is configured to operate in “set and forget” mode, it is capable of
providing precise interrupts at regular intervals with minimal processor
intervention. The counter has output compare logic to provide the status and
interrupt at comparison. This timer can be configured to run either on an external
clock or on an internal clock.
The GPU provides hardware acceleration for 2D and 3D graphics
algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD720
resolution. It supports color representation up to 32 bits per pixel.
The GPU with its 128 KByte memory enables high performance mobile 3D and
2D vector graphics at rates up to 27 Mtriangles/sec, 166 Mpixels/sec,
664 Mpixels/sec (Z).
The GPU2D provides hardware acceleration for 2D graphic
algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD720 resolution.
I
to 400 Kbps are supported by two of the I
(I
Note: See the errata for the HS-I
I
2
2
2
C provides serial interface for controlling peripheral devices. Data rates of up
C modules have no errata.
C Specification v2.1) are supported by the HS-I
Brief Description
2
C in the i.MX51 Chip Errata. The two standard
2
C ports. Data rates of up to 3.4 Mbps
2
C.
Features
7

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