MCIMX515DJM8C Freescale, MCIMX515DJM8C Datasheet - Page 70

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MCIMX515DJM8C

Manufacturer Part Number
MCIMX515DJM8C
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX515DJM8C

Operating Temperature (min)
-20C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Electrical Characteristics
1
2
4.7
The following sections provide information on external peripheral interfaces.
70
DDR24
DDR25
DDR26
Test conditions are: Capacitance of 15 pF for DDR contacts. The recommended drive strength is Medium for SDCLK and High
for address and controls
SDCLK and DQS related parameters are being measured from the 50% point. that is, high is defined as 50% of signal value
and low is defined as 50% as signal value. DDR SDRAM CLK parameters are measured at the crossing point of SDCLK and
SDCLK_B.
ID
DQS (input)
SDCLK_B
DQ (input)
SDCLK
DQS - DQ Skew (defines the Data valid window in read cycles related to
DQS).
DQS DQ in HOLD time from DQS
DQS output access time from SDCLK posedge
External Peripheral Interfaces
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Figure 36. DDR2 SDRAM DQ versus DQS and SDCLK Read Cycle
DDR26
DDR24
Table 63. DDR2 SDRAM Read Cycle
Parameter
DATA
DATA
DDR25
DATA
DATA
DATA
1
Symbol
t
t
DQSCK
DQSQ
t
QH
DATA
SDCLK = 200 MHz
–0.5
Min
1.8
Freescale Semiconductor
DATA
Max
0.35
0.5
DATA
2
Unit
ns
ns
ns

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