CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 111

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Programmable Interrupt Control
5.8
The Programmable Interrupt Control subsystem (PIC) is
illustrated in Figure 5-18. The major modules are the Map-
per and Masks (MM), Extended PIC (XPIC), and Legacy
8259A PIC (LPIC).
Features
• Two x86 compatible 8259As
• 15-Level Priority Controller
• Programmable Interrupt Modes
• Individual Request Mask Capability
• Individual Edge/Level Controls
• Complete 8259A state read back via shadow registers
• Mapper routes 62 inputs to 15 legacy interrupts and one
• All 62 inputs individually maskable and status readable
Note: The outputs are organized into 16 groups of four signals each, except IG0 and IG2; they have two signals each.
AMD Geode™ CS5535 Companion Device Data Book
Asynchronous System Management Interrupt (ASMI)
(MSRs 51400020h-51400027h or PIC I/O Offsets 00h-
1Ch, see Section 6.9.1 on page 350)
Unrestricted Y Input 15
Unrestricted Z Input 15
Unrestricted Y Input 0
Unrestricted Y Input 1
Unrestricted Y Input 2
Unrestricted Y Input 3
Unrestricted Z Input 0
Unrestricted Z Input 1
Unrestricted Z Input 2
Unrestricted Z Input 3
Primary Input 15
Programmable Interrupt Control
Primary Input 0
Primary Input 1
Primary Input 3
Primary Input 4
LPC Input 15
LPC Input 0
LPC Input 1
LPC Input 3
LPC Input 4
:
:
:
:
Mapper
Masks
(MM)
and
Figure 5-18. PIC Subsystem
IG0 (Note)
IG2 (Note)
IG10
IG11
IG12
IG13
IG14
IG15
IG1
IG3
IG4
IG5
IG6
IG7
IG8
IG9
5.8.1
This block maps and masks up to 62 interrupt sources to
60 discrete Extended PIC (XPIC) inputs. The sources are
organized into four groups:
1)
2)
3)
4)
The outputs are organized into 16 groups of four signals
each, except groups 0 and 2; they have two signals each.
Each group is called an Interrupt Group (IG). Each pre-
defined input is mapped to a specific IG. Each unrestricted
input can be mapped to any IG except IG0. Regardless of
mapping, any interrupt source can be masked to prevent
participation in the interrupt process. Once the input to out-
put map is established along with the mask values, signal
flow from input to output is always completely combina-
tional.
Extended
15 Primary pre-defined inputs (see Table 5-12)
15 LPC inputs pre-defined (see Table 5-12)
16 Unrestricted Y inputs (see Table 5-13)
16 Unrestricted Z inputs (see Table 5-14)
(XPIC)
PIC
Mapper and Masks
(IRQ2)
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ0
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
31506B
Legacy
8259A
(LPIC)
PICs
ASMI
INTR
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