CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 146

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.13
The Low Pin Count port is based on Intel’s Low Pin Count
(LPC) Interface Specification v1.0. In addition to the
required pins, the Geode CS5535 companion device also
supports two optional pins: LDRQ# and SERIRQ. The LPC
interface supports memory, I/O, DMA, and Intel’s Firmware
Hub Interface. Figure 5-38 shows the block diagram of the
LPC port.
Features
• Based on Intel’s Low Pin Count (LPC) Specification
• Serial IRQ support.
146
v1.0.
To PIC
LPC Master
Local Bus Master
Local Bus Slave
SIRQ
LDRQ
DRQ
LPC Reg
LPC to/from Local Bus
Busy
Low Pin Count Port
31506B
Busy
Local Bus Slave
Initiates all transactions on LPC bus, takes/issues requests from Local bus.
Takes request from LPC master and DMA.
Issues request to LPC master from Local bus.
Decodes SERIRQ into IRQ to be passed on to PIC.
Decodes LDRQ# into DRQ sets and clears.
Combines multiple LDRQ# outputs and passes results to DMA.
Contains all the LPC I/O registers.
LPC to Local bus interface module.
Generates busy signal for clock controls.
SERIRQ
SIRQ
LPC Reg
Figure 5-38. LPC Block Diagram
GeodeLink™ Adapter
LPC to/from Local Bus
LFRAME#
LPC Master
Local Bus
LAD[3:0]
• Supports memory, I/O, and DMA cycle types.
• Bus master cycles not supported.
• CLKRUN# and LPCPD# not supported. SMI# and PME#
• On-chip DMA transfers through LPC.
• Supports Intel’s FirmWare Hub (FWH) Interface:
supported via GPIOs.
— 5 Signal communication interface supporting byte-at-
— LAD[3:0] called as FWH0-FWH3 and LFRAME# as
a-time reads and writes.
FWH4.
AMD Geode™ CS5535 Companion Device Data Book
Local Bus Master
LDRQ#
LDRQ
DRQ
Low Pin Count Port
From DMA
To DMA