CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 152

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.13.3
The LPC supports a serial IRQ scheme. This allows a sin-
gle signal to be used to report ISA-style interrupt requests.
Because more than one device may need to share the sin-
gle serial IRQ signal, an Open Collector signaling scheme
is used.
Serial interrupt information is transferred using three types
of frames: a Start frame, one or more IRQ Data frames,
and one Stop frame (see Figure Figure 5-42, Figure 5-43,
and Figure 5-44 on page 153). There are also two modes
of operation. Quiet mode, initiated by the peripheral, and
Continuous mode, initiated by the host:
1)
2)
Data Frame
Once the Start frame has been initiated, all of the serial
interrupt peripherals must start counting frames based on
the rising edge of the SERIRQ. Each of the IRQ/DATA
frames has exactly three phases of one clock each: a Sam-
ple phase, a Recovery phase, and a Turn Around phase.
During the sample phase, the device drives SERIRQ low if
the corresponding interrupt signals should be active. If the
corresponding interrupt is inactive, then the devices should
not drive the SERIRQ signal. It will remain high due to pull-
up registers. During the other two phases (Turn Around
and Recovery), no device should drive the SERIRQ signal.
The IRQ/DATA frames have a specific order and usage as
shown in Table 5-26.
152
Quiet (Active) Mode: To indicate an interrupt, the
peripheral brings the SERIRQ signal active for one
clock, and then places the signal in TRI-STATE mode.
This brings all the state machines from the Idle state to
the Active state.
The host then takes control of the SERIRQ signal by
driving it low on the next clock, and continues driving it
low for 3-7 clocks more (programmable). Thus, the
total number of clocks low will be 4-8. After those
clocks, the host drives SERIRQ high for one clock and
then places SERIRQ into the TRI-STATE mode.
Continuous (Idle) Mode: In this mode, the host ini-
tiates the Start frame, rather than the peripherals. Typ-
ically,
(acknowledges). The host drives SERIRQ low for 4-8
clocks. This is the default mode after reset; it can be
used to enter the Quiet Mode.
Serial IRQ
this
is
31506B
done
to
update
IRQ
status
Stop Frame
After all of the Data frames, a Stop frame is performed by
the host. This is accomplished by driving SERIRQ low for
two to three clocks. The number of clocks determines the
next mode:
• If the SERIRQ is low for two clocks, the next mode is the
• If SERIRQ is low for three clocks, the next cycle is the
Quiet mode. Any device may initiate a Start frame in the
second clock (or more) after the rising edge of the Stop
frame.
Continuous mode. Only the host may initiate a Start
frame in the second clock (or more) after the rising edge
of the Stop frame.
Date Frame Number
AMD Geode™ CS5535 Companion Device Data Book
31-16
Table 5-26. IRQ Data Frames
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
SMI# (Not Supported)
Unassigned
Low Pin Count Port
Usage
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ0
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9