CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 177

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Power Management Control
5.17.3.2 Sleep Controls
Sleep Request/Sleep Acknowledge handshake (see Figure
5-53 on page 174) between the GLCP and PMC controls
the transitions into and out of the Sleep and Standby
states. The PMC starts the Sleep sequence by asserting
Sleep Request to the GLCP. The GLCP requests the pro-
cessor to enter C2 by asserting the SUSP# signal. When
SUSPA# from the processor is received, the GLCP informs
the internal GeodeLink Devices of a pending shutdown and
waits until the GeodeLink Devices’ clock control indicates
that they are ready. The length of time it takes for each
device
51700008h, 51700013h, and 5170000Bh). After all desig-
nated GeodeLink Devices have responded, the GLCP
asserts Sleep Acknowledge to the PMC.
The PM_IN_SLPCTL (PMS I/O Offset 20h) register and the
PM_OUT_SLPCTL (PMS I/O Offset 0Ch) are used to dis-
able PCI/IDE inputs and outputs respectively during Sleep.
Generally, they are asserted at the end of a Sleep
sequence and de-asserted at the beginning of a Wakeup
sequence. When “disabled”, some of the outputs are
forced to TRI-STATE with an active internal pull-down
resistor while the rest are simply pulled low. See Section
4.8.5 "MSR Address 4: Power Management" on page 78
for specific details on PCI/IDE I/O controls during Sleep.
5.17.3.3 Power Controls
In response to Sleep Acknowledge from the GLCP, the
PMC
SLEEP_Y, SLP_CLK_EN#, WORKING, and WORK_AUX.
These can control external electronic power switches and
enables. Each control’s assertion and de-assertion is sub-
ject to an enable and a programmable delay (PMS I/O Off-
set 04h to 3Ch).
Controls SLEEP_X and SLEEP_Y are generic and have no
specific use. Asserting control SLP_CLK_EN# is assumed
to turn off the system (board) clocks. It is always de-
asserted by the wakeup event. The following conditions
apply to the timing of selected output control (see Section
5.17.3.2 "Sleep Controls"), SLEEP_X, SLEEP_Y and
SLP_CLK_EN#.
AMD Geode™ CS5535 Companion Device Data Book
can
to
respond
assert
five
is
programmable
controls/enables:
(GLCP
SLEEP_X,
MSR
When going to sleep:
a) If not enabled, SLEEP_X and SLEEP_Y do not assert at
all. If they are enabled, the delay should be set to occur
between the delays programmed in the PM_IN_SLPCTL
and PM_OUT_SLPCTL registers.
b) If SLP_CLK_EN# is enabled, any delays associated with
the PM_OUT_SLPCTL, SLEEP_X, and SLEEP_Y regis-
ters must be less than the SLP_CLK_EN# delay.
c) If SLP_CLK_EN# is enabled, then Sleep wakeup is pos-
sible only after SLP_CLK_EN# asserts.
d) If SLP_CLK_EN# is not enabled, and if at least one of
the following PM_OUT_SLPCTL, SLEEP_X, or SLEEP_Y
registers is enabled, then Sleep wakeup is possible only
after the longest delay of the three. The delays could be
zero.
e)
PM_OUT_SLPCTL, SLEEP_X, or SLEEP_Y registers are
not enabled, then Sleep wakeup is possible immediately.
f) If SLP_CLK_EN# is enabled and the delay associated
with the PM_OUT_SLPCTL register is longer than or equal
to the delay associated with SLP_CLK_EN#, then the
PCI/IDE outputs will not be disabled.
If enabled, the de-assertion of WORKING is assumed to
remove Working power and all clock sources except 32
kHz; that is, the Standby state is entered. In this state, the
PMC, disables its interface to all circuits connected to
Working power and asserts RESET_OUT# before de-
assertion of WORKING. RESET_OUT# remains asserted
throughout Standby.
WORK_AUX is an auxiliary control for the Standby state
with no specific use. It can be de-asserted any time before
or after WORKING.
WORKING and WORK_AUX are independent controls, but
the use of either implies that Standby state is to be
entered. In both cases, the PMC disables all circuits con-
nected to Working power and asserts reset. However,
since they are independent, one may be left on while the
other is de-asserted.
If
SLP_CLK_EN#
is
31506B
not
enabled,
and
177
the