CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 180

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.17.5
A large number of inputs to the PMC are used to monitor
and create system power managements events. Some of
these inputs apply the Working state machine while the
remainder apply to the Standby state machine.
5.17.5.1 PM Sleep Events
• Sleep:
• Wakeup:
5.17.5.2 PM Standby Events
• Standby:
180
Event
The following events are Sleep and/or Standby wakeup events (except for ACPI Timer).
PWR_BUT#
(also serves as a
Standby event)
SLP_BTN
RTC Alarm
ACPI Timer
(internal timer)
— Sleep sequence initiated by software
— Assertion of the Sleep Button (SLEEP_BUT)
— Assertion of the Power Button (PWR_BUT#)
— RTC alarm
— Working power domain PMEs
— Standby power domain PMEs
— Sleep sequence initiated by software
— LVD detection of low voltage on V
PMC Power Management Events
31506B
Current
State
Working
Sleep
Standby
Working
Sleep
Working
Sleep
Standby
Working
Function
Sets the status bit (PWRBTN_STS) in PM1_STS (ACPI I/O Offset 00h[8] = 1).
If PWRBTN_EN is enabled (ACPI I/O Offset 02h[8] = 1), an SCI is generated.
Sets the status bit (PWRBTN_STS) in PM1_STS (ACPI I/O Offset 00h[8] = 1).
If PWRBTN_EN is enabled (ACPI I/O Offset 02h[8] = 1), SCI generation and wakeup
from this event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset 00h[15] = 1).
Sets the status bit (PWRBTN_STS) in PM1_STS (ACPI I/O Offset 00h[8] = 1).
If PWRBTN_EN is enabled (ACPI I/O Offset 02h[8] = 1), SCI generation and wakeup
from this event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset 00h[15] = 1).
Sets the status bit (SLPBTN_STS) in PM1_STS (ACPI I/O Offset 00h[9] = 1).
If SLPBTN_EN is enabled (ACPI I/O Offset 02h[9] = 1), an SCI is generated.
Sets the status bit (SLPBTN_STS) in PM1_STS (ACPI I/O Offset 00h[9] = 1).
If SLPBTN_EN is enabled (ACPI I/O Offset 02h[9] = 1), SCI generation and wakeup
from this event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset 00h[15] = 1).
Sets the status bit (RTC_STS) in PM1_STS (ACPI I/O Offset 00h[10] = 1).
If RTC_EN is enabled (ACPI I/O Offset 02h[10] = 1), an SCI is generated.
Sets the status bit (RTC_STS) in PM1_STS (ACPI I/O Offset 00h[10] = 1).
If RTC_EN is enabled (ACPI I/O Offset 02h[10] = 1), SCI generation and wakeup
from this event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset 00h[15] = 1).
Sets the status bit (RTC_STS) in PM1_STS (ACPI I/O Offset 00h[10] = 1).
If RTC_EN is enabled (ACPI I/O Offset 02h[10] = 1), SCI generation and wakeup
from this event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset 00h[15] = 1).
Sets the status bit (TMR_STS) in PM1_STS (ACPI I/O Offset 00h[0] = 1).
If TMR_EN is enabled (ACPI I/O Offset 02h[0] = 1), an SCI is generated.
Table 5-35. PM Events and Functions
CORE
(system fault)
• Wakeup:
Table 5-35 provides a complete list of the power manage-
ment inputs and describes their function. The system can
only be in one of three states: Working, Sleep, or Standby.
The activity of the inputs is to move the system from one
state to another.
— Assertion of the Power Button for 4 seconds
— Thermal Alarm (THRM_ALRM#, system fault)
— Low battery (LOW_BAT#, system fault)
— Hardware reset (system restart)
— Software initiated reset (system restart)
— Shutdown initiated reset, CPU triple fault (system
— Watchdog initiated reset (system restart)
— GLCP software initiated reset (system restart)
— Bad packet type reset (system restart)
— Reset Standby state machine RESET_STAND#
— Assertion of the Power Button (PWR_BUT#)
— RTC Alarm
— Standby power domain PMEs
(PWR_BUT#, system fault)
restart)
(Standby)
AMD Geode™ CS5535 Companion Device Data Book
Power Management Control