CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 207

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

GeodeLink™ Interface Unit Register Descriptions
Note 1. These are synchronous errors, that is, they do not result in the assertion of the GL Error signal but instead set the
AMD Geode™ CS5535 Companion Device Data Book
31:12
10:8
Bit
39
38
37
36
35
34
33
32
11
7
6
5
4
3
2
1
0
Exception bit in the response packet.
Name
RQCOMP_
ERR_FLAG
RSVD
STATCNT2_
ERR_FLAG
STATCNT1_
ERR_FLAG
STATCNT0_
ERR_FLAG
SSMI_ERR_
FLAG
UNEXP_ADD_
ERR_FLAG
UNEXP_TYPE
_ERR_FLAG
RSVD
DACOMP_
ERR_EN
RSVD
RQCOMP_
ERR_EN
RSVD
STATCNT2_
ERR_EN
STATCNT1_
ERR_EN
STATCNT0_
ERR_EN
SSMI_ERR_
EN
UNEXP_ADD_
ERR_EN
UNEXP_TYPE
_ERR_EN
GLIU_GLD_MSR_ERROR Bit Descriptions (Continued)
Description
Request Comparator Error Flag. If high, records that an ERR was generated due to a
Request Comparator 0 (RQ_COMP_VAL, MSR 510100C0h) event. Write 1 to clear; writ-
ing 0 has no effect. RQCOMP_ERR_EN (bit 7) must be low to generate ERR and set flag.
Reserved. Write as read.
Statistic Counter 2 Error Flag. If high, records that an ERR was generated due to a Sta-
tistic Counter 2 (MSR 510100A8h) event. Write 1 to clear; writing 0 has no effect.
STATCNT2_ERR_EN (bit 5) must be low to generate ERR and set flag.
Statistic Counter 1 Error Flag. If high, records that an ERR was generated due to a Sta-
tistic Counter 1 (MSR 510100A4h) event. Write 1 to clear; writing 0 has no effect.
STATCNT2_ERR_EN (bit 4) must be low to generate ERR and set flag.
Statistic Counter 0 Error Flag. If high, records that an ERR was generated due to a Sta-
tistic Counter 0 (MSR 510100A4h) event. Write 1 to clear; writing 0 has no effect.
STATCNT0_ERR_EN (bit 3) must be low to generate ERR and set flag.
SSMI Error Flag. If high, records that an ERR was generated due an unhandled SSMI
(synchronous error). Write 1 to clear; writing 0 has no effect. SSMI_ERR_EN (bit 2) must
be low to generate ERR and set flag. (Note 1)
Unexpected Address Error Flag. If high, records that an ERR was generated due an
unexpected address (synchronous error). Write 1 to clear; writing 0 has no effect.
UNEXP_ADD_ERR_EN (bit 1) must be low to generate ERR and set flag. (Note 1)
Unexpected Type Error Flag. If high, records that an ERR was generated due an unex-
pected type (synchronous error). Write 1 to clear; writing 0 has no effect.
UNEXP_TYPE_ERR_EN (bit 0) must be low to generate ERR and set flag. (Note 1)
Reserved. Write as read.
Data Comparator Error Enable. Write 0 to enable DACOMP_ERR_FLAG (bit 43) and to
allow a Data Comparator (DA_COMP_VAL_LO / DA_COMP_VAL_HI, MSR 510100D0h /
510100D1h) event to generate an ERR and set flag.
Reserved. Write as read.
Request Comparator Error Enable. Write 0 to enable RQCOMP_ERR_FLAG (bit 39) and
to allow a Request Comparator (RQ_COMP_VAL, MSR 510100C0h) event to generate an
ERR.
Reserved. Write as read.
Statistic Counter 2 Error Enable. Write 0 to enable STATCNT2_ERR_FLAG (bit 37) and
to allow a Statistic Counter 2 (MSR 510100A8h) event to generate an ERR.
Statistic Counter 1 Error Enable. Write 0 to enable STATCNT1_ERR_FLAG (bit 36) and
to allow a Statistic Counter 1 (MSR 510100A4h) event to generate an ERR.
Statistic Counter 0 Error Enable. Write 0 to enable STATCNT0_ERR_FLAG (bit 35) and
to allow a Statistic Counter 0 (MSR 510100A0h) event to generate an ERR.
SSMI Error Enable. Write 0 to enable SSMI_ERR_FLAG (bit 34) and to allow the unhan-
dled SSMI (synchronous error) event to generate an ERR.
Unexpected Address Error Enable. Write 0 to enable UNEXP_ADD_ERR_FLAG (bit 33)
and to allow the unexpected address (synchronous error) event to generate an ERR.
Unexpected Type Error Enable. Write 0 to enable UNEXP_TYPE_ERR_FLAG (bit 32)
and to allow the unexpected type (synchronous error) event to generate an ERR.
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