CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 239

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

GeodeLink™ PCI South Bridge Register Descriptions
Note 1. For memory, 4 KB granularity, inclusive: [63:44] <= address[31:12] <= [31:12].
6.2.2.3
MSR Address
Type
Reset Value
Reads back the value of PCI Configuration Space Header Byte 0-3 (GLPCI_PCI_HEAD_BYTE0-3). See Section 6.2.3.1 on
page 240 for register map and bit definitions.
6.2.2.4
MSR Address
Type
Reset Value
Reads back the value of PCI Configuration Space Header Byte 4-7 (GLPCI_PCI_HEAD_BYTE4-7). See Section 6.2.3.2 on
page 241 for register map and bit definitions.
6.2.2.5
MSR Address
Type
Reset Value
Reads back the value of PCI Configuration Space Header Byte 8-B (GLPCI_PCI_HEAD_BYTE8-B). See Section 6.2.3.3
on page 241 for register map and bit definitions.
AMD Geode™ CS5535 Companion Device Data Book
63:44
43:33
31:12
11:4
Bit
32
3
2
1
0
For I/O, 4B granularity, inclusive: [63:46] <= address[19:2] <= [31:14].
PCI Configuration Space Header Byte 0-3 (GLPCI_PCIHEAD_BYTE0-3)
PCI Configuration Space Header Byte 4-7 (GLPCI_PCIHEAD_BYTE4-7)
PCI Configuration Space Header Byte 8-B (GLPCI_PCIHEAD_BYTE8-B)
Name
TOP
RSVD (RO)
SPACE
BASE
RSVD (RO)
PF
RSVD (RO)
RH
EN
51000030h
RO
00000000_002A100Bh
51000031h
RO
00000000_00000000h
51000032h
RO
00000000_00000000h
Description
Top of Region. For memory use [63:44] as top of address bits [31:12]. For I/O use
[63:46] as top of address bits [19:2]. (Note 1)
Reserved (Read Only): Returns 0.
Region Space Indicator.
0: Memory space.
1: I/O space.
Base of Region. For memory use [31:12] as base of address bits [31:12]. For I/O use
[31:14] as base of address bits [19:2]. (Note 1)
Reserved (Read Only). Returns 0.
Prefetchable. If region is memory and this bit is set, it indicates a prefetechable memory
region. Reads to this region have no side-effects. If region is I/O and this bit is set, post all
I/O writes to this region.
Reserved (Read Only). Returns 0.
Retry/Hold. Defines whether GLPCI_SB PCI slave generates a retry condition or holds
the PCI bus until cycle completion. Note that even if hold is selected, the cycle will be ter-
minated if initial latency time-out is reached.
0: Retry.
1: Hold.
Region Enable. Set to 1 to enable access to this region.
GLPCI_REGCONF[x] Bit Descriptions
31506B
239