CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 252

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Quantity
Price
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CS5535-UDCF
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6.3.2
6.3.2.1
ACC I/O Offset
Type
Reset Value
252
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
28:22
19:0
Bit
31
30
29
21
20
ACC Native Registers
Codec GPIO Status Register (ACC_GPIO_STATUS)
Name
GPIO_EN
INT_EN
WU_INT_EN
RSVD
INT_FLAG
WU_INT_FLAG
PIN_STS
00h
R/W
00000000h
RSVD
31506B
Description
GPIO Enable. This bit determines if the codec GPIO pin data is sent out in slot 12 of
the serial output stream.
0: Send 0s and tag slot 12 as invalid.
1: Send GPIO pin data and tag slot valid.
Codec GPIO Interrupt Enable. Allow a codec GPIO interrupt to set the codec GPIO
interrupt flag and generate an IRQ.
0: Disable.
1: Enable.
A GPIO interrupt is defined by serial data in slot 12, bit 0
Codec GPIO Wakeup Interrupt Enable. Allow a codec GPIO wakeup interrupt to set
the codec GPIO wakeup interrupt flag and generate an IRQ.
0: Disable.
1: Enable.
A codec GPIO wakeup interrupt is defined as a 0-to-1 transition of AC_S_IN or
AC_S_IN2 while the codec is powered down. This bit can only be set after the codec(s)
are powered down (See Audio Driver Power-up/down Programming Model on
page 98).
Reserved. Reads return 0.
Codec GPIO Interrupt Flag (Read to Clear). If the GPIO interrupt is enabled (bit 30 =
1) then this flag is set upon a codec GPIO interrupt event (serial data in slot 12, bit 0 =
1), and an IRQ is generated.
Codec GPIO Wakeup Interrupt Flag (Read to Clear). If the GPIO wakeup interrupt is
enabled (bit 29 = 1), then this flag is set when a GPIO wakeup interrupt occurs, and an
IRQ is generated.
Codec GPIO Pin Status (Read Only). This is the GPIO pin status that is received from
the codec in slot 12 of the serial input stream. This is updated every time slot 12 of the
input stream is tagged valid.
Note:
ACC_GPIO_STATUS Bit Descriptions
ACC_GPIO_STATUS Register Map
All 20 bits of input slot 12 are visible in this register, including reserved bits
within slot 12.
AMD Geode™ CS5535 Companion Device Data Book
AC97 Audio Codec Controller Register Descriptions
PIN_STS
9
8
7
6
5
4
3
2
1
0

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