CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 295

no-image

CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
USB Controller Register Descriptions
AMD Geode™ CS5535 Companion Device Data Book
31:11
Bit
7:6
1:0
10
9
8
5
4
3
2
Name
RSVD
RemoteWakeup
Connected
Enable
RemoteWakeup
Connected
InterruptRouting
HostController
FunctionalState
BulkListEnable
ControlList
Enable
Isochronous
Enable
PeriodicList
Enable
ControlBulk
ServiceRatio
HCD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
USBC_HcControl Bit Descriptions
R/W
R/W
R/W
HC
RO
RO
RO
RO
RO
RO
RO
Description
Reserved. Read/write 0s.
Remote Wakeup Connected Enable. This bit is used by the
HCD to enable or disable the remote wakeup feature upon the
detection of upstream resume signaling. When this bit is set and
the ResumeDetected bit in HcInterruptStatus is set, a remote
wakeup is signaled to the host system. Setting this bit has no
impact on the generation of hardware interrupt.
In the host controller, this bit is cleared to 0 on hardware reset
and is write-read. Otherwise, it does nothing. It can be used as a
flag by software as indicated above. Setting this bit will not
enable or disable remote wakeup. That is covered in the Power
Management Controller.
Remote Wakeup Connected. This bit indicates whether the HC
supports remote wakeup signaling. If remote wakeup is sup-
ported and used by the system it is the responsibility of system
firmware to set this bit during POST. The HC clears the bit upon a
hardware reset but does not alter it upon a software reset.
Remote wakeup signaling of the host system is host-bus-specific
and is not described in this specification.
In the host controller, it is cleared to 0 on hardware reset and is
write-read. Otherwise, it does nothing. It can be used as a flag by
software as indicated above.
Interrupt Routing. This bit is used for interrupt routing.
0: Interrupts routed to normal interrupt mechanism (INT).
1: Interrupts routed to SMI.
Host Controller Functional State. This field sets the HC state.
The HC may force a state change from UsbSuspend to UsbRe-
sume after detecting resume signaling from a downstream port.
States are:
00: UsbReset.
01: UsbResume.
10: UsbOperational.
11: UsbSuspend.
Bulk List Enable. When set, this bit enables processing of the
Bulk list.
Control List Enable. When set, this bit enables processing of
the Control list.
Isochronous Enable. When clear, this bit disables the Isochro-
nous List when the Periodic List is enabled (so Interrupt EDs may
be serviced). While processing the Periodic List, the HC will
check this bit when it finds an isochronous ED.
Periodic List Enable. When set, this bit enables processing of
the Periodic (interrupt and isochronous) list. The HC checks this
bit prior to attempting any periodic transfers in a frame.
Control Bulk Service Ratio. Specifies the number of Control
Endpoints serviced for every Bulk Endpoint. Encoding is N-1
where N is the number of Control Endpoints (i.e., 00 = 1 Control
Endpoint; 11 = 3 Control Endpoints).
31506B
295

Related parts for CS5535-UDCF