CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 334

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.6.2.10 Legacy I/O Space Controls (DIVIL_LEG_IO)
MSR Address
Type
Reset Value
334
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit
31
30
29
28
27
26
25
24
Name
RESET_SHUT_
EN
RESET_BAD_EN
RSVD
SPEC_CYC_MD
0X000E_XXXX
0X000F_XXXX
LPC_DISABLE_
MEM
LPC_DISABLE_
IO
51400014h
R/W
04000003h
31506B
Description
Shutdown Reset Enable If set, this bit will enable the issuance of the RESET_OUT#
signal upon the detection of a PCI Shutdown cycle from the Geode GX processor (or
any other PCI master). The reason for the reset is recorded in the PM_SSC register
(PMS I/O Offset 54h[9], see Section 6.18.3.19 on page 517 for bit details).
0: Do not issue RESET_OUT# upon detection of Shutdown cycle.
1: Issue RESET_OUT# upon detection of Shutdown cycle.
Bad Transaction Reset Enable If set, this bit will enable a system wide reset via the
RESET_OUT# signal, if the GeodeLink Adapter detects a ‘bad’ GeodeLink transaction.
The reason for the reset is recorded in the PM_SSC register (PMS I/O Offset 54h[12],
see Section 6.18.3.19 on page 517 for bit details).
0: Do not issue RESET_OUT# upon detection of a “bad” transaction.
1: Issue RESET_OUT# upon detection of a “bad” transaction
Reserved: This bit should always be written to 0.
Special Cycle Mode. Allows selection of how the DIVIL decodes Local bus address for
GeodeLink special cycles. (Defaults 0.)
0: Decode is per the PCI spec:
1: Decode is per the x86 standard:
000Exxxxh Remap. If high, memory addresses in the range of 000Exxxxh are re-
mapped to FFFExxxxh. Applies to addresses except the LBAR comparators and other
address decode functions. (Defaults 0.)
000Fxxxxh Remap. If high, memory addresses in the range of 000Fxxxxh are re-
mapped to FFFFxxxxh. Applies to addresses except the LBAR comparators and other
address decode functions. (Defaults 1.)
LPC Disable Memory. If high, discard all memory writes which would otherwise go to
the LPC by default. For reads, return all 1s. “Default” means any address not explicitly
mapped into on-chip memory space or claimed by an LBAR hit.
LPC Disable I/O. If high, discard all I/O writes which would otherwise go to the LPC by
default. For reads, return all 1s. “Default” means any address not explicitly mapped into
on-chip legacy I/O space or claimed by an LBAR hit.
00h: Shutdown.
01h: Halt.
All other values ignored.
00h: Shutdown.
02h: Halt.
All other values ignored.
DIVIL_LEG_IO Bit Description
DIVIL_LEG_IO Register Map
AMD Geode™ CS5535 Companion Device Data Book
Diverse Integration Logic Register Descriptions
RSVD
9
8
7
6
5
4
3
2
1
0