CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 342

no-image

CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
6.8.1
6.8.1.1
MSR Address
Type
Reset Value
6.8.1.2
MSR Address
Type
Reset Value
342
Bit
7:0
Bit
7:5
7
7
PIT Specific MSRs
PIT Shadow (PIT_SHDW)
PIT Count Enable (PIT_CNTRL)
Name
PIT_SHDW (RO)
Name
RSVD
51400036h
RO
00h
51400037h
R/W
03h
RSVD
6
6
31506B
Description
PIT Shadow (Read Only). This 8-bit port sequences through the following list of shad-
owed Programmable Interval Timer registers. At power on, a pointer starts at the first
register in the list and consecutively reads to increment through it. A write to this regis-
ter resets the read sequence to the first register. Each shadow register in the sequence
contains the last data written to that location.
The read sequence for this register is:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Note: The LSB / MSB of the count is the Counter base value, not the current value. In
the case of counter mode 3, the LSB of the count is the Counter base value - 1 (even
count value). Bits [7:6] of the command words are not used.
Description
Reserved. Read zero. Write “don’t care”.
5
5
Counter 0 LSB (least significant byte)
Counter 0 MSB
Counter 1 LSB
Counter 1 MSB
Counter 2 LSB
Counter 2 MSB
Counter 0 Command Word
Counter 1 Command Word
Counter 2 Command Word
PIT_CNTRL Bit Descriptions
PIT_SHDW Bit Descriptions
PIT_CNTRL Register Map
PIT_SHDW Register Map
ACC_DLY_EN
PIT_CNTR_
4
4
PIT_SHDW
3
3
AMD Geode™ CS5535 Companion Device Data Book
Programmable Interval Timer Register Descriptions
RSVD
2
2
PIT_CNTR1_
EN
1
1
PIT_CNTR0_
EN
0
0

Related parts for CS5535-UDCF