CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 37

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Signal Definitions
3.2.1
AMD Geode™ CS5535 Companion Device Data Book
Signal Name
SUSP#
CIS
SUSPA#
IRQ13
V
V
V
LVD_EN#
BAT
SS_VBAT1
SS_VBAT2
System Interface Signals (Continued)
Ball No.
P3
N1
K2
A3
C4
B2
C7
AGND
Type
Wire
Wire
O
O
I
I
Description
Suspend. This signal goes low in response to events as determined by
the power management logic. It requests the Geode GX processor to
enter the Suspend state. This is the default state for this ball at reset.
Not used in normal operation.
CPU Interface Serial. A 20-bit serial status word is output on this ball,
synchronized to PCI_CLK. Data changes on the rising edge and is sta-
ble on the falling edge of PCI_CLK. This WORD is output whenever
one of the internally-monitored signals changes states. See Section
5.2.14 "CPU Interface Serial (CIS)" on page 87 for details. Used in nor-
mal operation.
Suspend Acknowledge. This input signal is driven low by the Geode
GX processor when it has successfully entered the Suspend state.
Interrupt Request Level 13. Floating Point error. Connect directly to
IRQ13 of the Geode GX processor.
Real-Time Clock Battery Back-Up. Battery voltage on this ball keeps
the real-time clock and CMOS RAM circuits continuously powered.
If not used, tie to ground.
2.4-3.6V, typical 3.0V.
10 µA max.
This ball incorporates a reverse bias protection diode on-chip. There is
no need for an external diode.
Real-Time Clock Battery Grounds 1 and 2
Low Voltage Detect Enable. LVD_EN# enables/disables the on-chip
low voltage detection circuit. When disabled, the external subsystem
must assert RESET_STAND# as Standby power is applied and must
assert RESET_WORK# as Working power is applied. When LVD is
enabled, use of these two resets are optional. Generally,
RESET_STAND# would be tied high (not used) while RESET_WORK#
would be tied to a reset output that is typically available from the power
supply. However, a system could just have a simple regulator circuit
and also tie RESET_WORK# high.
Tie to V
5 µA typical.
SS
to enable. Tie to V
IO_VSB
to disable.
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