CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 415

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

UART and IR Port Register Descriptions
6.12.10.4 Bank Select Register (BSR)
I/O Offset
Type
Reset Value
BSR is the same as the BSR register at I/O Offset 03h in Bank 0. See Section 6.12.3.4 "Link Control/Bank Select Regis-
ters" on page 390 for bit descriptions.
6.12.10.5 IR Interface Configuration Register 1 (IRCFG1)
I/O Offset
Type
Reset Value
IRCFG1 holds the transceiver configuration data for Sharp-IR and SIR modes. It is also used to directly control the trans-
ceiver operation mode when automatic configuration is not enabled. The two next-to-least significant bits are used to read
the identification data of a plug-and-play IR interface adapter.
AMD Geode™ CS5535 Companion Device Data Book
STRV_MS
Bit
2:0
7
6
5
4
3
7
Name
STRV_MS
RSVD
SET_IRTX
IRRX1_LV
RSVD
IRIC[2:0]
03h
R/W
00h
04h
R/W
xxh
RSVD
6
Description
Special Transceiver Mode Selection. When this R/W bit is set to 1, the UART[x]_IR_TX
output signal is forced to active high and a timer is started. The timer times out after 64
micro-seconds, at which time the bit is reset and the UART[x]_IR_TX output signal
becomes low again. The timer is restarted every time a 1 is written to this bit. Although it
is possible to extend the period during which UART[x]_IR_TX remains high beyond 64
micro-seconds, this should be avoided to prevent damage to the transmitter LED. Writing
a 0 to this bit has no effect.
Reserved. Write as 0.
Set IRTX. When this bit is set to 1, it forces the UART[x]_IR_TX signal high.
Caution: Indefinite HIGH output should be avoided as this condition can damage the
transmitter LED.
IRRX1 Level (Read Only). This bit reflects the value of the UART[x]_IR_RX input signal.
Reserved. Write as 0.
Transceiver Identification and Control Bits 2 through 0. The function of IRIC0
depends on whether the UART[x]_IRSL0/IRRX2 signal is programmed as an input or an
output. If programmed as an input (IRSL0_DS = 0, bit 5 of IRCFG4) then upon a read,
this bit returns the logic level of the signal. Data written to this bit position is ignored. The
other two signals (IRSL1, IRSL2) must be programmed as outputs only (IRSL21_DS = 1,
bit 3 of IRCFG4).
If the UART[x]_IRSL0/IRRX2 signal is programmed as an output, IRIC[2:0] drives the
IRSL[2:0] signals to select the operation mode of an infrared dongle. (These bits are
reflected in bits [4:2] of MSR_UART[x]_DONG). When read, these bits return the values
previously written.
Below is the operation mode encoding for non-serial transceivers.
00x: IrDA-data modes.
010: Reserved.
011: 36 kHz consumer IR.
100: 40 kHz consumer IR.
101: 38 kHz consumer IR
110: Reserved.
111: 56.9 kHz consumer IR.
SET_RTX
5
IRCFG1 Bit Descriptions
IRCFG1 Register Map
IRRX1_LV
4
RSVD
3
2
31506B
IRIC[2:0]
1
0
415