CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 45

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Signal Definitions
3.2.6
Note 1. All LPC signals, except LPC_CLK are shared on GPIO balls (see Table 3-8 "GPIO Options" on page 47). The Ge-
3.2.7
AMD Geode™ CS5535 Companion Device Data Book
Signal Name
(Note 1)
LPC_SERIRQ
LPC_FRAME#
Signal Name
(Note 1)
AC_CLK
AC_S_OUT
BOS1
AC_S_IN
ode CS5535 companion device powers up with this group of balls set to the LPC mode; to use them as GPIOs they
must be explicitly reprogrammed. The LPC signals may be switched to GPIOs use via MSR 51400015h (see Sec-
tion 6.6.2.11 "Ball Options Control (DIVIL_BALL_OPTS)" on page 335).
Use RESET_OUT# for LPC reset.
Use any GPIO assigned as a PME for the LPC PME.
Use any GPIO assigned as an SMI for the LPC SMI.
Use general Sleep and Standby controls (SLEEP_X, ball C2 and SLEEP_Y, ball J3) in place of LPC_PD# for LPC
power-down.
Low Pin Count (LPC) Interface
Audio Codec 97 Interface
Ball No.
Ball No.
M1
L2
L1
G2
H3
Type
O
I
I
I
Type
I/O
O
Description
Audio Bit Clock. The serial bit clock from the codec. The frequency of
the bit clock is 12.288 MHz and is derived from the 24.576 MHz crystal
input to the external audio codec. Not required if audio not used; tie low.
Audio Controller Serial Data Out. This output transmits audio data to
the codec. This data stream contains both control data and the DAC
audio data. The data is sent on the rising edge of the AC_CLK. Connect
to the audio codec’s serial data input pin.
Boot Options Select Bit 1. During system reset, this ball is the MSB of
the 2-bit boot option (balls L2 and L3) and is used to determine the loca-
tion of the system boot device. It should be pulled low if required by Table
3-5 "Boot Options Selection" on page 34, otherwise, an internal pull-up,
asserted during reset, will pull it high. During reset, the ball output drivers
are held in TRI-STATE mode, and the ball is sampled on the rising edge
of RESET_OUT# (i.e., when external reset is de-asserted). After reset,
this signal defaults low (off).
Audio Controller Serial Data Input. This input receives serial data from
the audio codec. This data stream contains both control data and ADC
audio data. This input data is sampled on the falling edge of
AC_CLK.Connect to the audio codec’s serial data output pin.
Description
LPC Encoded IRQ. This is the LPC serial interrupt request line, used
to report ISA-style interrupt requests. It may be activated by either the
Geode CS5535 companion device or an LPC peripheral.
An external pull-up of 100 kΩ is required if this ball is used in LPC
mode to maintain a high level when the signal is in TRI-STATE. From
reset, this signal is not driven.
If the device wakes up from Sleep, at least six LPC_CLKs must occur
before this input is asserted if operating in Quiet mode.
Shared with GPIO21. See Table 3-8 "GPIO Options" on page 47.
LPC Frame. This signal provides the active-low LPC FRAME signal
used to start and stop transfers on the LPC bus.
Shared with GPIO22. See Table 3-8 "GPIO Options" on page 47.
31506B
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