CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 463

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

GPIO Subsystem Register Descriptions
6.16.2.13 GPIO Input Auxiliary 1 Select (GPIO[x]_IN_AUX1_SEL)
Each GPIO has a dedicated internal destination for the conditioned input from the component ball; these inputs are acti-
vated when Auxiliary 1 Input is selected. Table 3-8 "GPIO Options" on page 47 shows all the dedicated destinations. These
registers select the Auxiliary 1 Input of the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. Auxiliary 1 Input is
selected as the input if the feature bit is high. Auxiliary 1 is not selected as the input if the feature bit is low. (These registers
use atomic programming, see Section 6.16.1 on page 454 for details.)
GPIO Low Bank Input Auxiliary 1 Select
(GPIOL_IN_AUX1_SEL)
GPIO I/O Offset
Type
Reset Value
6.16.2.14 GPIO/IN_AUX Event Enable (GPIO[x]_EVNT_EN)
These registers control the Event Enable for INT (Interrupt) and PME (Power Management Event) mapping of the low
(GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. The GPIO is enabled for mapping if the feature bit is high. The GPIO
is disabled from mapping if the feature bit is low. Actual mapping is performed by the GPIO X, Y, Z, and W mapping regis-
ters, detailed on page 482 through page 479; the Event Enable registers simply enable/disable the associated GPIO for
mapping. (These registers use atomic programming, see Section 6.16.1 on page 454 for details.)
GPIO Low Bank Events Enable (GPIOL_EVNT_EN)
GPIO I/O Offset
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
34h
R/W
FFFF0000h
38h
R/W
FFFF0000h
GPIOH_IN_AUX1_SEL Register Map
GPIOL_IN_AUX1_SEL Register Map
GPIOH_EVNT_EN Register Map
GPIOL_EVNT_EN Register Map
GPIO High Bank Input Auxiliary 1 Select
(GPIOH_IN_AUX1_SEL)
GPIO I/O Offset
Type
Reset Value
GPIO High Bank Events Enable (GPIOH_EVNT_EN)
GPIO I/O Offset
Type
Reset Value
B4h
R/W
EFFF1000h
B8h
R/W
FFFF0000h
9
9
9
9
8
8
8
8
31506B
7
7
7
7
6
6
6
6
5
5
5
5
4
4
4
4
3
3
3
3
2
2
2
2
1
1
1
1
463
0
0
0
0