CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 502

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

502
15:7
Bit
16
6
5
4
3
2
1
0
Name
GPIOM0_PME_
FLAG
RSVD
USBC2_PME_
FLAG
USBC1_PME_
FLAG
UART2_PME_
FLAG
UART1_PME_
FLAG
SMB_PME_
FLAG
PIC_ASMI_PME_
FLAG
PIC_IRQ_PME_
FLAG
31506B
Description
GPIO IRQ/PME Mapper Bit 0PME Flag. If high, this bit records that a PME occurred
via bit 0 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit
in
passed on to the system. Write 1 to clear; writing 0 has no effect.
Reserved. Reads return 0; writes have no effect
USB Controller #2 PME Flag. If high, this bit records that a PME occurred via USB
Controller #2. Both this bit and the corresponding enable bit in
I/O Offset 1Ch[6]) must be high in order for this PME to be passed on to the system.
Write 1 to clear; writing 0 has no effect.
USB Controller #1 PME Flag. If high, this bit records that a PME occurred via USB
Controller #1. Both this bit and the corresponding enable bit in
I/O Offset 1Ch[5]) must be high in order for this PME to be passed on to the system.
Write 1 to clear; writing 0 has no effect.
UART #2 PME Flag. If high, this bit records that a PME occurred via UART #2. Both
this bit and the corresponding enable bit in
must be high in order for this PME to be passed on to the system. Write 1 to clear; writ-
ing 0 has no effect.
UART #1 PME Flag. If high, this bit records that a PME occurred via UART #1. Both
this bit and the corresponding enable bit in
must be high in order for this PME to be passed on to the system. Write 1 to clear; writ-
ing 0 has no effect.
SMB PME Flag. If high, this bit records that a PME occurred via the SMB. Both this bit
and the corresponding enable bit in
high in order for this PME to be passed on to the system. Write 1 to clear; writing 0 has
no effect.
PIC ASMI PME Flag. If high, this bit records that a PME occurred due to a PIC ASMI.
Both this bit and the corresponding enable bit in
1Ch[1]) must be high in order for this PME to be passed on to the system. Write 1 to
clear; writing 0 has no effect.
PIC Interrupt PME Flag. If high, this bit records that a PME occurred due to a PIC
Interrupt. Both this bit and the corresponding enable bit in
Offset 1Ch[0]) must be high in order for this PME to be passed on to the system. Write
1 to clear; writing 0 has no effect.
PM_GPE0_EN
PM_GPE0_STS Bit Descriptions
(ACPI I/O Offset 1Ch[16]) must be high in order for this PME to be
PM_GPE0_EN
AMD Geode™ CS5535 Companion Device Data Book
Power Management Controller Register Descriptions
PM_GPE0_EN
PM_GPE0_EN
PM_GPE0_EN
(ACPI I/O Offset 1Ch[2]) must be
PM_GPE0_EN
(ACPI I/O Offset 1Ch[4])
(ACPI I/O Offset 1Ch[3])
PM_GPE0_EN
PM_GPE0_EN
(ACPI I/O Offset
(ACPI I/O
(ACPI
(ACPI