CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 506

no-image

CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
6.18.3.4 PM Sleep Output Disable Assert Delay and Enable (PM_OUT_SLPCTL)
PMS I/O Offset
Type
Reset Value
Reads always return the value written.
506
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:0
Bit
31
30
Name
RSVD
PCI_IDE_OUT_
SLP
PCI_IDE_OUT_
SLP_DELAY
0Ch
R/W
00000000h
31506B
Description
Reserved. By convention write 0, but may write anything.
PCI/IDE Output Sleep Control. Allows the delay specified in bits [29:0]
(PCI_IDE_OUT_SLP_DELAY) to turn off PCI/IDE outputs as listed in Table 4-11
"Sleep Driven PCI Signals" and Table 4-12 "Sleep Driven IDE Signals" on page 79.
Individual enables exist for PCI (PCI GLD_MSR_PM, MSR 51000004h[49:48]) and
IDE (IDE GLD_MSR_PM, MSR 51300004h[49:48]). Output control immediately
enables the PCI/IDE outputs when SUSP# de-asserts.
0: Disable.
1: Enable.
PCI/IDE Output Sleep Control Delay. Indicates the number of 3.57954 MHz clock
edges to wait from Sleep wakeup before PCI/IDE outputs are disabled. Bit 30
(PCI_IDE_OUT_SLP) must be high to enable this delay.
The PCI/IDE outputs will not turn off if this delay is larger than SLPCLK_DELAY (PMS
I/O Offset 10h[29:0]). This is only true if SLPCLK_EN is enabled (PMS I/O Offset
10h[30] = 1).
PM_OUT_SLPCTL Bit Descriptions
PM_OUT_SLPCTL Register Map
PCI_IDE_OUT_SLP_DELAY
AMD Geode™ CS5535 Companion Device Data Book
Power Management Controller Register Descriptions
9
8
7
6
5
4
3
2
1
0

Related parts for CS5535-UDCF