CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 534

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
6.20.1.4 GLD Error MSR (GLCP_GLD_MSR_ERROR)
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 0. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 4.8.4 "MSR Address 3: Error Control" on page 78
for further ERR generation details.)
534
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:34
31:2
Bit
33
32
1
0
Name
RSVD
SIZE_ERR_FLAG
UNEXP_TYPE_
ERR_FLAG
RSVD
SIZE_ERR_EN
UNEXP_TYPE_
ERR_EN
51700003h
R/W
00000000_00000000h
31506B
GLCP_GLD_MSR_ERROR Bit Descriptions
Description
Reserved. Reads as 0.
Size Error Flag. The GLIU interface detected a read or write of more than 1 data
packet (size = 16 or 32 bytes). If a response packet is expected, the EXCEP bit of the
response packet will be set; in all cases the asynchronous error signal will be set.
Write 1 to clear; writing 0 has no effect.
Unexpected Type Error Flag. An unexpected type was sent to the GLCP GeodeLink
interface (start request with BEX type, snoop, peek_write, debug_req, or NULL type).
If a response packet is expected, the EXCEP bit of the response packet will be set; in
all cases the asynchronous error signal will be set. Write 1 to clear; writing 0 has no
effect.
Reserved. Reads as 0.
Size Error Enable. Write 0 to enable the flag (bit 33) and allow the size error event to
generate an asynchronous error to the system.
Unexpected Type Error Enable. Write 0 to enable the flag (bit 32) and allow the
unexpected type event to generate an asynchronous error to the system.
GLCP_GLD_MSR_ERROR Register Map
RSVD
RSVD
GeodeLink™ Control Processor Register Descriptions
AMD Geode™ CS5535 Companion Device Data Book
9
8
7
6
5
4
3
2
1
0

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