CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 65

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Global Concepts and Features
4.6
The elements that effect “reset” within the Geode CS5535
companion device are illustrated in Figure 4-6 on page 66.
The following points are significant:
• Signals denoted in upper case (i.e., all capitals) are
• There are separate resets for the Working power
• All elements in the figure are within the Standby power
• The TAP Controller is in the Working power domain, but
• Any time the Geode CS5535 companion device is in the
• Any faulted event or external reset input forces the
• External reset (RESET_OUT#) is always asserted
• IDE_RESET# is always asserted immediately with
• LVD monitors V
• LVD monitors V
AMD Geode™ CS5535 Companion Device Data Book
external pins. Signals denoted in lower case are internal
signals.
domain (RESET_WORK#) and the Standby power
domain (RESET_STAND#).
domain and operate off the KHZ32_CLK.
it may be reset separately from the other Working
domain logic.
Standby state, the Working power domain is uncondi-
tionally and immediately driven into reset.
Geode CS5535 companion device into the Standby
state.
immediately with internal working domain reset. Deas-
sertion is also immediate unless the event is a wakeup
from a soft off condition (see Section 5.17.3.4 "Wakeup
Events" on page 178 for details). RESET_OUT# asserts
without any clocks but requires the KHZ32_CLK for the
delay and the PCI_CLK to de-assert.
internal working domain reset and de-asserts when the
ATAC comes out of reset, that is, within a few
MHZ66_CLK edges of internal reset de-assert.
power_good_working when V
operating range.
RESET_STAND#. The assertion of power_good_standy
only occurs when the voltages are within normal oper-
ating range and RESET_STAND# is high, that is, de-
asserted.
Reset Considerations
CORE
CORE_VSB
and only asserts
and V
CORE
IO_VSB
is within normal
along with
When power is applied to the Geode CS5535 companion
device from a completely cold start, that is, no Standby or
Working
RESET_WORK# are applied. Alternatively, one or both of
the reset inputs may be tied to Standby I/O power
(V
Good Working and internal Power Good Standby. Assum-
ing the LVD circuit is enabled (LVD_EN# pin tied low),
Power Good Standby will assert until proper Standby volt-
ages have been achieved and RESET_STAND# has been
de-asserted.
RESET_OUT# is de-asserted synchronous with the low-to-
high edge of PCI_CLK. The de-assertion is delayed from
internal_reset using a counter in the Power Management
Controller. This counter is driven by the 32 kHz clock and is
located in the Standby power domain. The value of the
counter is programmable but defaults to 0x0_0100 (256
edges). 31.25 µs per edge times 256 equals an 8 ms delay.
Note
RESET_STAND# and is not effected by RESET_WORK#.
Therefore, the delay value may be changed and then the
system can be reset with the new value.
Note the special consideration for TAP Controller reset.
When boundary scan is being performed, internal compo-
nent operation is not possible due to the scanning signals
on the I/Os. Under this condition, it is desirable to hold the
component internals in reset while the boundary scan is
being performed by the TAP Controller. However, under
normal operation, it is desirable to reset the TAP Controller
with the other logic in the Working domain during power
management sequences.
Achieving these dual goals is accomplished as follows:
For boundary scan:
• Assert RESET_STAND#, causing internal
• Assert and de-assert RESET_WORK# as needed to
For normal operation:
• The internal Power Good Standby will be high, meaning
IO_VSB
power_good_standby to go low. This causes the
complete component to reset, except for the TAP
Controller. Keep this input held low throughout boundary
scan operations.
reset the TAP Controller.
the TAP Controller reset asserts any time the Standby
state is active or anytime RESET_WORK# is active.
this
), and the LVD circuit will generate internal Power
power,
counter
both
default
31506B
RESET_STAND#
is
established
and
by
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