CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 73
CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
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Global Concepts and Features
Note 1. The Diverse Device snoops writes to this port and maintains the MSB as NMI enable. When low, NMI is enabled.
AMD Geode™ CS5535 Companion Device Data Book
I/O Addr.
377h
378h-3E7h
3E8h-3EFh UART/IR - COM3
3F0h
3F1h
3F2h
3F3h
3F4h
3F5h
3F6h
3F7h
3F8h-3FFh
400h-47Fh
480h
481h
482h
483h
484h-486h
487h
488h
489h
48Ah
48Bh
48Ch-48Eh No Specific Usage
48Fh
490h-4CFh No Specific Usage
4D0h
4D1h
4D2h-4FFh No Specific Usage
When high, NMI is disabled. This bit defaults high. Reads of this port return bits [6:0] from the on-chip or off-chip
target, while bit 7 is returned from the “maintained” value.
Function
Floppy Conf Reg
No Specific Usage
Floppy Status R A
Floppy Status R B
Floppy Digital Out
No Specific Usage
Floppy Cntrl Status
Floppy Data
No Specific Usage
Floppy Conf Reg
UART/IR - COM1
No Specific Usage
No Specific Usage
DMA Channel 2 High Page
DMA Channel 3 High Page
DMA Channel 1 High Page
No Specific Usage
DMA Channel 0 High Page
No Specific Usage
DMA Channel 6 High Page
DMA Channel 7 High Page
DMA Channel 5 High Page
DMA Channel 4 High Page
PIC Level/Edge
PIC Level/Edge
Table 4-6. Legacy I/O: 000h-4FFh (Continued)
Size
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
---
---
---
---
Shw@
Shw$
Shw$
R/W
WO
Rec
WO
Rec
WO
Rec
WO
Rec
Yes
Yes
Yes
RO
RO
RO
---
---
---
---
---
---
---
---
Comment
Second Floppy.
MSR bit enables/disables into I/O
space.(UART1 MSR
51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to LPC.
First Floppy.
First Floppy.
First Floppy.
First Floppy.
First Floppy.
First Floppy.
MSR bit enables/disables into I/O
space.(UART1 MSR
51400014h[18:16], UART2 MSR
51400014h[22:20]). Defaults to LPC.
Write LPC and DMA. Read only
DMA.
Upper addr bits [31:24]. Write LPC
and DMA. Read only DMA.
Write LPC and DMA. Read only
DMA.
Upper addr bits [31:24]. Write LPC
and DMA. Read only DMA.
Write LPC and DMA. Read only
DMA.
Upper addr bits [31:24]. Write LPC
and DMA. Read only DMA.
Write LPC and DMA. Read only
DMA.
Upper addr bits [31:24]. Write LPC
and DMA. Read only DMA.
IRQ0-IRQ 7.
IRQ8-IRQ15.
31506B
73
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