CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 76

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
7)
8)
9)
10) If there was no Event[Y] at any point above, return to
Note: Step 5 above could occur at any time between step
4.8.3.2
An SSMI event is associated with an I/O space access to a
specific address or range of addresses. If SSMIs are
76
NESS remains high because Event[Y] has fired.
VSA sets EN[n] high. This action sets ASMI[n+1] high
again and causes another Geode CS5535 companion
device ASMI.
VSA begins to return to the process interrupted by the
original ASMI, but notes SMI into the processor is still
asserted and returns to step 3.
the interrupted process.
Event
[X]
2 and step 9, or the Event[Y] could come after step
10. Regardless, the same VSA approach is used in
order not to miss any events.
Apparent SSMI
+
FLAG Bits
Other
Native Event
Register
31506B
FLAG Bit[x]
D
D
Bit[m]
CI
CI
EN
Q
Q
Event
Figure 4-8. In-Direct ASMI Behavioral Model
[X]
Clear_By_Software
Set_By_Software
Clear_By_Software
ALL
OR
Summary Signal
Native Event
(NESS)
enabled for the given address, then the hardware traps or
blocks access to the target register. The actual register
write and/or read operation is not performed. Generally,
only write operations are trapped, but there are cases of
trapping writes and reads. The Geode CS5535 companion
device does not support SSMIs, however, the Geode
CS5535 companion device supports a mechanism called
“Apparent SSMI” using ASMIs. (Hereafter “Apparent SSMI”
is referred to as “SSMI”.)
The Geode CS5535 companion device insures that the
ASMI is taken on the I/O instruction boundary. The ASMI
reaches the CPU before a target ready is signaled on the
PCI bus. This action creates an SSMI because the I/O
instruction will not complete before ASMI reaches the CPU.
VSA
GLD_SMI_MSR to determine if an SSMI has occurred from
an I/O trap.
software
AMD Geode™ CS5535 Companion Device Data Book
+
Other ASMI
FLAG Bits
SMI MSR
FLAG Bit[n+1]
then
Bit[n]
D
D
EN
CI
CI
Q
Q
examines
Global Concepts and Features
ASMI
[n+1]
ALL
Clear_By_Software
Set_By_Software
Clear_By_Software
OR
the
GeodeLink™
Device ASMI
GLPCI_SB

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