CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 94

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Slot 11: Modem Headset ADC
Contains the modem headset ADC input data (16-bit reso-
lution, MSB first, unused LSBs = 0).
Slot 12: GPIO Status
This slot returns the pin status of the AC97 codec’s GPIO
pins (if implemented).
bits [19:4]
bits [3:1]
bit 0
Bit[0] indicates that there was a transition on one of the
unmasked codec GPIO pins (see AC97 Codec Specifica-
tion v2.1 for details). If the Codec GPIO Interrupt Enable bit
is set, then slot 12, bit[0] = 1 will trigger an IRQ and set the
Codec GPIO Interrupt Flag bit.
5.3.5
5.3.5.1
The AC Link interface signals can be placed in a low power
mode by programming the AC97 codec’s Power-down
Control/Status register. When this is performed, both the
AC_CLK and AC_S_IN are brought to a low voltage level
by the AC97 codec. This happens immediately following
the write to the AC97 codec’s Power-down Control/Status
register, so no data can be transmitted in slots 3-12 for the
frame signaling power-down. After powering down the AC
Link, the ACC must keep AC_S_SYNC and AC_S_OUT
low; hence, all the AC Link signals (input and output) are
driven low.
AC_CLK is de-asserted at the same time that bit[4] of slot 2
is being transmitted on the AC Link. This is necessary
because the precise time when the codec stops AC_CLK is
not known.
5.3.5.2
A warm reset re-activates the AC Link without altering the
registers in the AC97 codec. The ACC signals the warm
reset by driving AC_S_SYNC high for a minimum of 1 µs in
the absence of the AC_CLK. This must not occur for a min-
imum of four audio frame periods following power-down
(note that no bit clock is available during this time).
AC_S_SYNC is normally a synchronous signal to
AC_CLK, but when the AC97 codec is powered down, it is
treated as an asynchronous wakeup signal. During
wakeup, the AC97 codec does not re-activate the bit clock
until AC_S_SYNC is driven high (for 1 µs minimum) and
then low again by the ACC. Once AC_S_SYNC is driven
low, AC_CLK is re-asserted.
94
AC Link Power-down
AC Link Wakeup (Warm Reset)
AC Link Power Management
Value of the GPIO pins
(Up to 16 can be implemented)
Reserved
GPIO_INT input pin event interrupt
(1 = Event; 0 = No Event)
31506B
See "Audio Driver Power-up/down Programming Model" on
page 98 for additional power management information and
programming details.
5.3.6
Because the bus masters must feed data to the codec with-
out interruption, they require a certain amount of data buff-
ering.
The 32-bit bus masters (stereo) use 24 bytes of buffer
space, and the 16-bit bus masters (mono) use 20 bytes of
buffer space. A bus master will always do buffer fill/empty
requests whenever it can transfer 16 bytes of data. It will
attempt to do transfers of 16 bytes on a 16-byte boundary,
whenever possible. A bus master may do a transfer of
more (if it is just starting, and sufficient buffer space is
available) or less than 16 bytes (to bring itself onto a 16-
byte boundary). It may also do a transfer of less than 16
bytes if the size of the physical memory region causes it to
end on a non-16 byte boundary.
Some important details on how a bus master behaves:
• When an outgoing bus master is enabled, it begins
• When a bus master is disabled while operating, any data
• If the bus master is paused during recording or play-
• If a buffer underrun occurs on an outgoing bus master,
• If a buffer overrun occurs on an incoming bus master,
sending data over the AC Link as soon as data is avail-
able in its buffer. The slot valid tag for its slot will be
asserted beginning with the first audio sample.
in its buffer is lost. Re-enabling the bus master begins
by fetching a PRD.
back, the data in its buffer remains there in a frozen
state. Once resumed, it continues as if nothing has
occurred. If the bus master is playing back data, the
output slots corresponding to the bus master are tagged
invalid while it is in the paused state.
the output slots corresponding to the bus master are
tagged invalid until data becomes available.
samples coming in on the serial link are tossed away
until space becomes available in the bus master’s
buffer.
AMD Geode™ CS5535 Companion Device Data Book
Bus Mastering Buffer Scheme
AC97 Audio Codec Controller