SC1200UFH-266BF 33 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266BF 33 Datasheet - Page 100
SC1200UFH-266BF 33
Manufacturer Part Number
SC1200UFH-266BF 33
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.SC1200UFH-266BF_33.pdf
(443 pages)
Specifications of SC1200UFH-266BF 33
Lead Free Status / RoHS Status
Compliant
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5.4.2.2
Table 5-8 lists registers that are relevant to the configura-
tion of System Wakeup Control (SWC). These registers are
1.
100
Index
30h
60h
61h
70h
71h
74h
75h
The logical device registers are maintained, and all wakeup detection mechanisms are functional.
LDN 01h - System Wakeup Control
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
32579B
Configuration Register or Action
Activate. When bit 0 is cleared, the registers of this logical device are not accessible.
Base Address MSB register.
Base Address LSB register. Bits [3:0] (for A[3:0]) are RO, 0000b.
Interrupt Number. (For routing the internal PWUREQ signal.)
Interrupt Type. Bit 1 is R/W. Other bits are RO.
Report no DMA assignment.
Report no DMA assignment.
Table 5-8. Relevant SWC Registers
described earlier in Table 5-3 "Standard Configuration Reg-
isters" on page 95.
AMD Geode™ SC1200/SC1201 Processor Data Book
SuperI/O Module
1
Reset
Value
00h
00h
00h
00h
03h
04h
04h
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