PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 199
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
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Philips Semiconductors
12.17.2 Block Diagrams for a 16-bit interface
The following figures (i.e.
and
64-, 128- and 256-Mbit SDRAMs organized in x16. They
respectively build a memory system of 8-, 16- or 32-MB.
MM_CONFIG.SIZE must be set to 5 (i.e. 8-MB rank size,
Section
Figure 12-13. Schematic of a 8-MB memory system consisting of one 4×1M×16 SDRAM chips (one rank)
Figure 12-14. Schematic of a 16-MB memory system consisting of one 4×2M×16 SDRAM chips (one rank)
Figure
12.6.1) for all of the pictured configurations.
12-15) detail the SDRAM connections for the
Figure
MM_CLK[0]
MM_CLK[0]
12-13,
Figure 12-14
Address[11:0]
Address[11:0]
CLK
Control
CLK
Control
BA[1:0]
BA[1:0]
PNX1300
PNX1300
4×1M×16
4×2M×16
SDRAM
SDRAM
MM_CONFIG.BW must be set to ‘1’ (refer to bw,
Section
Note the connections described in
256-Mbit SDRAM device organized in x16 can also be
used to connect a 128-Mbit SDRAM device organized in
x16,
board for two different memory size configurations (i.e.
32 MB or 16 MB).
PRELIMINARY SPECIFICATION
DQM[1:0]
DQM[1:0]
DQ[15:0]
DQ[15:0]
CS#
CS#
Figure
12.6.1).
GND
GND
12-14, allowing the same footprint on the
MM_DQM[1:0]
MM_DQM[1:0]
MM_DQ[15:0]
MM_DQ[15:0]
SDRAM Memory System
Figure 12-15
for the
12-17
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