CY7C344B-20WC Cypress Semiconductor Corp, CY7C344B-20WC Datasheet
CY7C344B-20WC
Specifications of CY7C344B-20WC
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CY7C344B-20WC Summary of contents
Page 1
... All inputs, macrocells, and I/O pins are interconnected within the LAB. The speed and density of the CY7C344B makes it a natural for all types of applications. With just this one device, the designer can implement complex state machines, registered logic, and combinatorial “ ...
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... V or GND O CC Test Conditions 1.0 MHz 0V 1.0 MHz OUT R1 464Ω 3. GND 250Ω ≤ (b) 1.75V parameter refers to low-level TTL output current. OL CY7C344B [2] ...................– +25 mA [2] .........................................–2.0V to +7.0V [3] Ambient Temperature V CC ° ° 5V ±5% – +70 C ° ° 5V ±10% – +85 C Min ...
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... Exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. The CY7C344B contains circuitry to protect device pins from high-static voltages or electric fields; however, normal precautions should be taken to avoid applying any voltage higher than maximum rated voltages ...
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... DELAY COMB LATCH LAD SYSTEM CLOCK DELAYt ICS CLOCK DELAY t IC FEEDBACK DELAY t FD Figure 1. CY7C344B Timing Model Over Operating Range 7C344B-15 Min. [5] Com’l/Ind [5] Com’l/Ind Com’l/Ind 9 [5] Com’l/Ind Com’l/Ind 0 Com’l/Ind 6 Com’l/Ind 6 [6] Com’l/Ind 83.3 Com’ ...
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... Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind [5] Com’l/Ind [5] Com’l /Ind [5] Com’l/Ind Com’l/Ind 4 Com’l/Ind 5 Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind CY7C344B 7C344B-20 7C344B-25 Unit ...
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... REGISTERED FEEDBACK ASYNCHRONOUS CLOCK INPUT Internal Synchronous CLOCK FROM LOGIC ARRAY t RD DATA FROM LOGIC ARRAY OUTPUT PIN Document #: 38-03036 Rev. *D USE ULTRA37000™ FOR ALL NEW DESIGNS t /t PD1 PD2 CO1 AWH AS1 CY7C344B t AWL t ZX HIGH IMPEDANCE STATE Page [+] Feedback ...
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... LOGIC ARRAY DATA FROM LOGIC ARRAY REGISTER OUTPUT TO LOCAL LAB LOGIC ARRAY REGISTER OUTPUT TO ANOTHER LAB Document #: 38-03036 Rev. *D USE ULTRA37000™ FOR ALL NEW DESIGNS EXP t AWL RSU LATCH FD t PIA CY7C344B LAC LAD t t COMB CLR PRE FD Page [+] Feedback ...
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... RSU DATA FROM LOGIC ARRAY Ordering Information Speed (ns) Ordering Code 15 CY7C344B-15HC/HI CY7C344B-15JC/JI CY7C344B-15PC/PI CY7C344B-15WC/WI 20 CY7C344B-20HC/HI CY7C344B-20JC/JI CY7C344B-20PC/PI CY7C344B-20WC/WI 25 CY7C344B-25HC/HI CY7C344B-25JC/JI CY7C344B-25PC/PI Document #: 38-03036 Rev. *D USE ULTRA37000™ FOR ALL NEW DESIGNS t ICS t RH Package Name Package Type H64 28-Lead Windowed Leaded Chip Carrier ...
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... Package Diagrams Document #: 38-03036 Rev. *D USE ULTRA37000™ FOR ALL NEW DESIGNS 28-Pin Windowed Leaded Chip Carrier H64 CY7C344B 51-80077-** Page [+] Feedback ...
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... SEATING PLANE 1.345[34.16] 1.385[35.18] 0.120[3.05] 0.140[3.55] 0.015[0.38] 0.060[1.52] 0.055[1.39] 0.065[1.65] 0.015[0.38] 0.020[0.50] SEE LEAD END OPTION CY7C344B 51-85001-*A DIMENSIONS IN INCHES [MM] MIN. MAX. REFERENCE JEDEC MO-095 PACKAGE WEIGHT: 2.15 gms 0.290[7.36] 0.325[8.25] 0.009[0.23] 3° MIN. 0.012[0.30] 0.310[7.87] 0.385[9.78] 51-85014-*D Page ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. USE ULTRA37000™ FOR ALL NEW DESIGNS 28-Lead (300-Mil) Windowed CerDIP W22 MIL-STD-1835 D-15 Config. A CY7C344B 51-80087-** Page [+] Feedback ...
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... Description of Change SZV Change from Spec #: 38-00860 to 38-03036 RBI Power-up requirements added to Operating Range Information FSG Added note to title page: “Use Ultra37000 For All New Designs” KKV Minor change: fixed error in part number in header PCX Corrected header information CY7C344B Page [+] Feedback ...