SSTUM32866EC/S-T NXP Semiconductors, SSTUM32866EC/S-T Datasheet - Page 22

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SSTUM32866EC/S-T

Manufacturer Part Number
SSTUM32866EC/S-T
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTUM32866EC/S-T

Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
25
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
2V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
SSTUM32866_1
Product data sheet
Fig 26. Partial parity out voltage waveforms; propagation delay times with respect to
V
t
V
V
RESET input
PLH
T
IH
IL
= 0.5V
= V
= V
and t
ref
ref
PHL
DD
+ 250 mV (AC voltage levels) for differential inputs. V
250 mV (AC voltage levels) for differential inputs. V
.
are the same as t
Rev. 01 — 29 June 2007
RESET
output
1.8 V DDR2-1G configurable registered buffer with parity
LVCMOS
PD
.
0.5V
t
PHL
DD
V
T
002aaa376
IL
IH
= GND for LVCMOS inputs.
= V
SSTUM32866
V
V
V
V
IH
IL
OH
OL
DD
for LVCMOS inputs.
© NXP B.V. 2007. All rights reserved.
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