MT47H64M16HW-5EL:E Micron Technology Inc, MT47H64M16HW-5EL:E Datasheet - Page 131
MT47H64M16HW-5EL:E
Manufacturer Part Number
MT47H64M16HW-5EL:E
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H64M16HW-5ELE.pdf
(135 pages)
Specifications of MT47H64M16HW-5EL:E
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MRS Command to ODT Update Delay
Figure 80: Timing for MRS Command to ODT Update Delay
Figure 81: ODT Timing for Active or Fast-Exit Power-Down Mode
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
Notes:
During normal operation, the value of the effective termination resistance can be
changed with an EMRS set command.
Rtt setting
Command
Command
Address
Internal
1. The LM command is directed to the mode register, which updates the information in
2. To prevent any impedance glitch on the channel, the following conditions must be met:
ODT 2
ODT
CK#
CKE
CK#
Rtt
CK
CK
EMR (A6, A2), that is, Rtt (nominal).
t
entire duration of the
AOFD must be met before issuing the LM command; ODT must remain LOW for the
Valid
Valid
T0
T0
Old setting
t AOFD
t CK
EMRS 1
Ta0
Valid
Valid
T1
0ns
t CH
t
MOD window until
131
t CL
t AON (MIN)
t AOND
Ta1
NOP
Valid
Valid
t AON (MAX)
T2
t MOD
t
Undefined
MOD (MAX) updates the Rtt setting.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
Ta2
Valid
Valid
T3
t AOFD
Rtt Unknown
t
MOD is met.
1Gb: x4, x8, x16 DDR2 SDRAM
NOP
Ta3
Valid
Valid
T4
t IS
t AOF (MIN)
NOP
2
Rtt On
Ta4
Valid
Valid
T5
© 2004 Micron Technology, Inc. All rights reserved.
t AOF (MAX)
New setting
Indicates a break in
time scale
NOP
Ta5
Valid
Valid
Don’t Care
T6
ODT Timing
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