LPC1778FET208,551 NXP Semiconductors, LPC1778FET208,551 Datasheet - Page 91

MCU ARM 512K FLASH 208-TFBGA

LPC1778FET208,551

Manufacturer Part Number
LPC1778FET208,551
Description
MCU ARM 512K FLASH 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets

Specifications of LPC1778FET208,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
165
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-TFBGA
Processor Series
LPC177x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
SSP, I2S, USB, JTAG, Serial, UART, I2C, SD/MMC
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
165
Number Of Timers
4
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
100 mA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6688

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1778FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC178X_7X
Objective data sheet
11.8 I
Table 24.
T
[1]
Symbol
common to input and output
t
t
t
t
output
t
input
t
t
2
r
f
WH
WL
v(Q)
su(D)
h(D)
amb
Fig 25. I
S-bus interface
I2S_TX_SCK
I2S_TX_SDA
I2S_TX_WS
CCLK = 100 MHz; peripheral clock to the I
1600 ns, corresponds to the SCK signal in the I
=
40
2
Dynamic characteristics: I
Parameter
rise time
fall time
pulse width HIGH
pulse width LOW
data output valid time
data input set-up time
data input hold time
S-bus timing (transmit)
C to 85
All information provided in this document is subject to legal disclaimers.
C, V
DD(REG)(3V3)
Rev. 2 — 27 May 2011
t
WH
T
cy(clk)
= 3.0 V to 3.6 V. Values guaranteed by design.
2
t
Conditions
on pins I2S_TX_SCK and
I2S_RX_SCK
on pins I2S_TX_SCK and
I2S_RX_SCK
on pin I2S_TX_SDA;
on pin I2S_RX_SDA
on pin I2S_RX_SDA
v(Q)
S-bus interface pins
2
S-bus interface PCLK = CCLK / 4. I
t
v(Q)
t
WL
2
S-bus specification.
32-bit ARM Cortex-M3 microcontroller
[1]
[1]
[1]
[1]
[1]
[1]
[1]
t
f
LPC178x/7x
2
Min
-
-
25
-
-
5
2
S clock cycle time T
© NXP B.V. 2011. All rights reserved.
Max
6.7
8.0
-
25
6
-
-
t
r
002aag202
91 of 117
Unit
ns
ns
-
ns
ns
ns
ns
cy(clk)
=

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