LPC1788FET208,551 NXP Semiconductors, LPC1788FET208,551 Datasheet - Page 35

• Manufacturer Part Number: LPC1788FET208,551
• Description: MCU ARM 512K FLASH 208-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1788FET208,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 165
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-TFBGA
• Processor Series: LPC178x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: SSP, I2S, USB, JTAG, Serial, UART, I2C, SD/MMC
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 165
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 100 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6691

NXP Semiconductors
Table 3.
Not all functions are available on all parts. See
pins).
[1]
LPC178X_7X
Objective data sheet
Symbol
V
V
V
VREFP
V
V
V
XTAL1
XTAL2
DD(REG)(3V3)
DDA
DD(3V3)
SS
SSREG
SSA
PU = internal pull-up enabled (for V
pins, if not used, should be tied to ground or power to minimize power consumption.
Pin description
26,
86,
174
20
15,
60,
71,
89,
112,
125,
146,
165,
181,
198
24
33,
63,
77,
93,
114,
133,
148,
169,
189,
200
32,
84,
172
22
44
46
H4,
P11,
D11
G4
G3,
P6,
P8,
U13,
P17,
K16,
C17,
B13,
C9,
D7
K1
L3,
T5,
R9,
P12,
N16,
H14,
E15,
A12,
B6,
A2
D12,
K4,
P10
J2
M4
N4
…continued
G1,
N9,
E9
F2
E2,
L4,
K8,
L11,
J14,
E12,
E10,
C5
G2
H4,
P4,
L9,
L13,
G13,
D13,
C11,
B4
H3,
L8,
A10
F3
L2
K4
18,
60,
121
14
41,
62,
77,
102,
114,
138
17
44,
65,
79,
103,
117,
139
22,
59,
119
15
31
33
DD(REG)(3V3)
[14]
[16]
[14]
[16]
All information provided in this document is subject to legal disclaimers.
= 3.3 V, pulled up to 3.3 V); IA = inactive, no pull-up/down enabled; F = floating; floating
Table 2
Rev. 2 — 27 May 2011
S
S
S
S
G
G
G
I
O
(Ethernet, USB, LCD, QEI, SD/MMC, DAC pins) and
Description
3.3 V regulator supply voltage: This is the power supply for
the on-chip voltage regulator that supplies internal logic.
Analog 3.3 V pad supply voltage: This can be connected to
the same supply as V
noise and error. This voltage is used to power the ADC and
DAC. Note: this pin should be tied to 3.3V if the ADC and
DAC are not used.
3.3 V supply voltage: This is the power supply voltage for I/O
other than pins in the VBAT domain.
ADC positive reference voltage: This should be the same
voltage as V
error. The voltage level on this pin is used as a reference for
ADC and DAC. Note: this pin should be tied to 3.3V if the
ADC and DAC are not used.
Ground: 0 V reference for digital IO pins.
Ground: 0 V reference for internal logic.
Analog ground: 0 V power supply and reference for the ADC
and DAC. This should be the same voltage as V
be isolated to minimize noise and error.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
DDA
, but should be isolated to minimize noise and
32-bit ARM Cortex-M3 microcontroller
DD(3V3)
but should be isolated to minimize
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
SS
Table 7
, but should
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(EMC