STM32F207VET6 STMicroelectronics, STM32F207VET6 Datasheet - Page 22

• Manufacturer Part Number: STM32F207VET6
• Description: MCU ARM 512KB FLASH 100LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F207VET6

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 132K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11171

Description
2.2.17
a.
22/163
Voltage regulator
The regulator has five operating modes:
●
●
Regulator ON
The regulator ON modes are activated by default on LQFP packages.On WLCSP66
package, they are activated by connecting both REGOFF and IRROFF pins to V
only REGOFF must be connected to V
V
There are three regulator ON modes:
●
●
●
Regulator OFF
●
V
temperature range.
DD
DD
/V
minimum value is 1.8 V
Regulator ON
–
–
–
Regulator OFF
–
–
MR is used in nominal regulation mode (Run)
LPR is used in Stop mode
Power-down is used in Standby mode:
The regulator output is in high impedance: the kernel circuitry is powered down,
inducing zero consumption (but the contents of the registers and SRAM are lost).
Regulator OFF/internal reset ON
On WLCSP66 package, this mode is activated by connecting REGOFF pin to V
IRROFF pin to V
(IRROFF not available).
The regulator OFF/internal reset ON mode allows to supply externally a 1.2 V voltage
source through V
The following conditions must be respected:
–
–
DDA
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
V
between power domains.
If the time for V
reach 1.8 V
minimum value of 1.65 V is obtained when the device operates in a reduced
DD
should always be higher than V
(a)
SS
CAP_1
, then PA0 should be connected to the NRST pin (see
. On UFBGA176 package, only REGOFF must be connected to V
CAP_1
(a)
and V
.
Doc ID 15818 Rev 6
and V
CAP_2
CAP_2
SS
pins, in addition to V
on UFBGA176 package (IRROFF is not available).
to reach 1.08 V is faster than the time for V
CAP_1
and V
CAP_2
STM32F205xx, STM32F207xx
DD
.
to avoid current injection
Figure
SS
, while
DD
6).
DD
and
DD
to