CY2310ANZPVXC-1 Cypress Semiconductor Corp, CY2310ANZPVXC-1 Datasheet

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CY2310ANZPVXC-1

Manufacturer Part Number
CY2310ANZPVXC-1
Description
IC CLK BUFF 10OUT SDRAM 28SSOP
Manufacturer
Cypress Semiconductor Corp
Type
Clock Bufferr
Datasheet

Specifications of CY2310ANZPVXC-1

Package / Case
28-SSOP
Frequency - Max
100MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
100MHz
Number Of Outputs
10
Max Input Freq
100 MHz
Propagation Delay (max)
5 ns @ 3.135V to 3.465V
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output
-
Input
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2209-5
CY2310ANZPVXC-1

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2310ANZPVXC-1
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY2310ANZPVXC-1
Manufacturer:
SSOP28
Quantity:
16 583
Features
Cypress Semiconductor Corporation
Document #: 38-07142 Rev. *C
Logic Block Diagram
One input to 10 output buffer and driver
Supports up to four SDRAM SO-DIMMs
Two additional outputs for feedback
Serial interface for output control
Low skew outputs
Up to 100 MHz operation
Multiple V
Dedicated OE pin for testing
Space saving 28-pin SSOP package
3.3V operation
DD
and V
SS
pins for noise reduction
SCLOCK
BUF_IN
SDATA
OE
198 Champion Court
Serial Interface
Decoding
3.3V SDRAM Buffer for Mobile PCs
Functional Description
The CY2310ANZ is a 3.3V buffer designed to distribute high
speed clocks in mobile PC applications. The part has 10 outputs,
eight of which are used to drive up to four SDRAM SO-DIMMs.
The remaining are used for external feedback to a PLL. The
device operates at 3.3V and outputs can run up to 100 MHz, thus
making it compatible with Pentium II
CY2310ANZ can be used in conjunction with the CY2281 or
similar clock synthesizer for a full Pentium II motherboard
solution.
The CY2310ANZ also includes a serial interface which can
enable or disable each output clock. During power up, all output
clocks are enabled. A separate Output Enable pin facilitates
testing on ATE.
San Jose
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
,
CA 95134-1709
with 4 SO-DIMMs
Revised January 12, 2009
®
CY2310ANZ
processors. The
408-943-2600
[+] Feedback

Related parts for CY2310ANZPVXC-1

CY2310ANZPVXC-1 Summary of contents

Page 1

... Logic Block Diagram BUF_IN SDATA SCLOCK OE Cypress Semiconductor Corporation Document #: 38-07142 Rev. *C 3.3V SDRAM Buffer for Mobile PCs Functional Description The CY2310ANZ is a 3.3V buffer designed to distribute high speed clocks in mobile PC applications. The part has 10 outputs, eight of which are used to drive up to four SDRAM SO-DIMMs. ...

Page 2

Pin Configuration Table 1. Pin Summary Name Pins 10, 19, 24 12, 17, 21 DDIIC V 16 SSIIC BUF_IN SDATA 14 SCLK 15 SDRAM [0–3] ...

Page 3

Device Functionality OE SDRAM [0–17 BUF_IN Serial Configuration Map ■ The serial bits are read by the clock driver in the following order: Byte 0 - Bits Byte ...

Page 4

Maximum Ratings Supply Voltage to Ground Potential................–0.5V to +7.0V DC Input Voltage (Except BUF_IN) ....... –0. Input Voltage (BUF_IN) ............................–0.5V to +7.0V Operating Conditions Parameter V Supply Voltage DD T Operating Temperature (Ambient Temperature Load ...

Page 5

Switching Characteristics [3] Parameter Name Maximum Operating Frequency [2, 4] ÷ t Duty Cycle = [2] t Rising Edge Rate 3 [2] t Falling Edge Rate 4 [2] t Output to Output Skew 5 t SDRAM Buffer ...

Page 6

Figure 5. SDRAM Buffer LH and HL Propagation Delay INPUT OUTPUT Figure 6. SDRAM Buffer Enable and Disable Times OUTPUTS 0.1 μF Document #: 38-07142 Rev Three-State Active Figure 7. Test ...

Page 7

Application Information Clock traces must be terminated with either series or parallel termination normally done. Summary Surface mount, low ESR, ceramic capacitors should be used for filtering. Typically, these capacitors have a value of 0.1 μF. In some ...

Page 8

... Ordering Information Ordering Code CY2310ANZPVC–1T Pb-Free CY2310ANZPVXC–1 CY2310ANZPVXC–1T Package Diagram Figure 8. 28-Pin (5.3 mm) Shrunk Small Outline Package O28 Document #: 38-07142 Rev. *C Package Type 28-Pin SSOP - Tape and Reel 28-Pin SSOP 28-Pin SSOP - Tape and Reel CY2310ANZ Operating Range ...

Page 9

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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