NB6L14MNG ON Semiconductor, NB6L14MNG Datasheet

IC FANOUT BUFFER DIFF 1:4 16-QFN

NB6L14MNG

Manufacturer Part Number
NB6L14MNG
Description
IC FANOUT BUFFER DIFF 1:4 16-QFN
Manufacturer
ON Semiconductor
Series
ECLinPS MAX™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of NB6L14MNG

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVPECL, LVTTL
Output
LVCMOS, LVPECL
Frequency - Max
3GHz
Voltage - Supply
2.375 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
3GHz
Number Of Outputs
8
Max Input Freq
3000 MHz
Propagation Delay (max)
0.5 ns @ 2.375V to 3.63V
Supply Voltage (max)
3.63 V
Supply Voltage (min)
2.375 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Current
47 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB6L14MNG
NB6L14MNGOS

Available stocks

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Quantity
Price
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NB6L14MNG
Manufacturer:
ON
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NB6L14MNG
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Quantity:
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NB6L14
2.5 V/3.3 V 3.0 GHz
Differential 1:4 LVPECL
Fanout Buffer
Multi−Level Inputs with Internal Termination
Description
fanout buffer. The differential inputs incorporate internal 50 W
termination resistors that are accessed through the VT pin. This
feature allows the NB6L14 to accept various logic standards, such as
LVPECL, LVCMOS, LVTTL, CML, or LVDS logic levels. The
VREF_AC reference output can be used to rebias capacitor−coupled
differential or single−ended input signals. The 1:4 fanout design was
optimized for low output skew applications.
performance clock and data management products.
Features
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 4
The NB6L14 is a 3.0 GHz differential 1:4 LVPECL clock or data
The NB6L14 is a member of the ECLinPS MAX™ family of high
GND = 0 V
Input Clock Frequency > 3.0 GHz
Input Data Rate > 2.5 Gb/s
< 20 ps Within Device Output Skew
350 ps Typical Propagation Delay
150 ps Typical Rise and Fall Times
Differential LVPECL Outputs, 700 mV Amplitude, Typical
LVPECL Mode Operating Range: V
Internal 50 W Input Termination Resistors Provided
VREF_AC Reference Output Voltage
−40°C to +85°C Ambient Operating Temperature
Available in 3 mm x 3 mm 16 Pin QFN
These are Pb−Free Devices
CC
= 2.375 V to 3.63 V with
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
IN
VT
IN
EN
VREFAC
*For additional marking information, refer to
Application Note AND8002/D.
1
Figure 1. Simplified Logic Diagram
A
L
Y
W
G
(Note: Microdot may be in either loca-
tion)
ORDERING INFORMATION
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
http://onsemi.com
MN SUFFIX
CASE 485G
QFN−16
D
Publication Order Number:
Q
1
DIAGRAM*
16
MARKING
ALYWG
NB6L
NB6L14/D
14
G
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3

Related parts for NB6L14MNG

NB6L14MNG Summary of contents

Page 1

NB6L14 2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer Multi−Level Inputs with Internal Termination Description The NB6L14 is a 3.0 GHz differential 1:4 LVPECL clock or data fanout buffer. The differential inputs incorporate internal 50 W termination resistors ...

Page 2

GND Figure 2. QFN−16 Pinout (Top View) Table 1. EN TRUTH TABLE ...

Page 3

Table 3. ATTRIBUTES ESD Protection Moisture Sensitivity (Note 2) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 2. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter V Positive Power Supply ...

Page 4

Table 5. DC CHARACTERISTICS, Multi−Level Inputs, LVPECL Outputs V = 2.375 V to 3.63 V, GND = −40°C to +85° Symbol Characteristic I Power Supply Current (Inputs and Outputs Open) CC LVPECL OUTPUT DC ...

Page 5

Table 6. AC CHARACTERISTICS V Symbol Characteristic V Output Voltage Amplitude (@ V OUTPP f Maximum Operating Data Rate DATA t Propagation Delay PD t Set−Up Time (Note 11 Hold Time (Note 11 Within−Device Skew (Note ...

Page 6

Figure 5. Typical Phase Noise Plot 311.04 MHz carrier Figure 7. Typical Phase Noise Plot GHz carrier The above phase noise plots captured using Agilent E5052A show additive phase noise of the NB6L14 ...

Page 7

Figure 10. Differential Input Driven Single−Ended D D Figure 12. Differential Inputs Driven Differentially Figure 14. AC Reference Measurement INn 50 W VTn 50 ...

Page 8

LVPECL − Driver GND Figure 15. LVPECL Interface V CC CML Driver GND Figure 17. Standard 50 W Load CML Interface V ...

Page 9

... Figure 21. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device NB6L14MNG NB6L14MNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 10

... E2 e 3.25 0.128 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81− ...

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