CY22381FSZC Cypress Semiconductor Corp, CY22381FSZC Datasheet - Page 5

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CY22381FSZC

Manufacturer Part Number
CY22381FSZC
Description
IC CLOCK GEN PROG 3-PLL 8-SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of CY22381FSZC

Pll
Yes
Input
LVTTL, Crystal
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:3
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
428-1918 - KIT DEV FTG PROGRAMMING KIT428-1456 - SOCKET ADAPTER FOR CY22381
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY22381FSZC
Manufacturer:
XILINX
Quantity:
43
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Supply Voltage................................................–0.5V to +7.0V
DC Input Voltage ..............................–0.5V to + (V
Storage Temperature .................................. –65°C to +125°C
Junction Temperature .................................................. 125°C
Operating Conditions
Recommended Crystal Specifications
Electrical Characteristics
Notes
Document #: 38-07012 Rev. *H
V
T
C
f
t
F
C
R
DL
I
I
C
C
C
V
V
I
I
I
1. Unless otherwise noted, Electrical and Switching Characteristics are guaranteed across these operating conditions.
2. External input reference clock must have a duty cycle between 40% and 60%, measured at V
3. Guaranteed by design, not 100% tested.
REF
PU
OH
OL
IH
IL
OZ
Parameter
Parameter
Parameter
A
DD
NOM
IH
IL
LOAD_OUT
LNOM
1
XTAL_MIN
XTAL_MAX
IN
Supply Voltage
Commercial Operating Temperature, Ambient
Industrial Operating Temperature, Ambient
Max. Load Capacitance
External Reference Crystal
External Reference Clock
External Reference Clock
Power up time for all VDD's to reach minimum specified voltage (power
ramps must be monotonic)
Output High Current
Output Low Current
Crystal Load Capacitance
Crystal Load Capacitance
Input Pin Capacitance
HIGH-level Input Voltage
LOW-level Input Voltage
Input HIGH Current
Input LOW Current
Output Leakage Current
Nominal crystal frequency
Nominal load capacitance
Equivalent series resistance
(ESR)
Crystal drive level
Description
Description
[3]
[3]
[3]
[2]
[2]
[3]
[3]
, Commercial
, Industrial
Description
Parallel resonance, fundamental mode
Fundamental mode
No external series resistor assumed
V
V
Capload at minimum setting
Capload at maximum setting
Except crystal pins
CMOS levels,% of V
CMOS levels,% of V
V
V
Three-state outputs
OH
OL
IN
IN
= V
= +0.3 V
= 0.5V, V
DD
= V
DD
+ 0.5V)
DD
– 0.3 V
– 0.5, V
Conditions
Description
DD
= 3.3 V
DD
DD
DD
= 3.3 V
Data Retention at Tj = 125°C ................................> 10 years
Maximum Programming Cycles........................................100
Package Power Dissipation...................................... 250 mW
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ........................... ≥ 2000V
Latch up (per JEDEC 17) ....................................
[1]
DD
/2.
3.135
0.05
70%
Min
Min
–40
Min
12
12
8
8
0
8
1
1
Typ.
Typ
Typ
0.5
3.3
24
24
30
<1
<1
6
7
Max
3.465
Max
30%
Max
+70
+85
166
150
500
30
20
50
15
30
2
10
10
10
CY223811
CY22381
MHz
Unit
mW
Unit
MHz
MHz
MHz
Unit
pF
V
V
Page 5 of 11
mA
mA
±200 mA
Ω
ms
pF
pF
pF
μA
μA
μA
°C
°C
pF
V
DD
DD
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