ICS525R-11LF IDT, Integrated Device Technology Inc, ICS525R-11LF Datasheet - Page 2

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ICS525R-11LF

Manufacturer Part Number
ICS525R-11LF
Description
IC PECL CLK USER CONFIG 28-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of ICS525R-11LF

Pll
Yes with Bypass
Input
Clock, Crystal
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
No/No
Frequency - Max
40MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
40MHz
Number Of Elements
1
Supply Current
6mA
Pll Input Freq (min)
2MHz
Pll Input Freq (max)
50MHz
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
0C to 70C
Package Type
QSOP
Output Frequency Range
0.75 to 40MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Pin Count
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
525R-11LF
IDT™ / ICS™ USER CONFIGURABLE CLOCK
ICS525-01/02/11/12
USER CONFIGURABLE CLOCK
Pin Assignment
Pin Descriptions
Number
10 - 18
3, 4, 5
24-28
6, 23
9, 20
1, 2,
Pin
19
21
22
7
8
KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections
X1/ICLK
GND
VDD
R5
R6
S0
S1
S2
X2
V0
V1
V2
V3
V4
S0, S1, S2
X1/ICLK
R5, R6,
V0 - V8
Name
R0-R4
ICS525-01/-02/-11/-12
GND
VDD
CLK
REF
Pin
PD
X2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Output
Output
Power
Power
Type
I(PU)
I(PU)
I(PU)
Input
Pin
X1
X2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Reference divider word input pins determined by user. Forms a binary number from 0
to 127.
Select pins for output divider determined by user. See table on page 3
Connect to VDD.
Crystal connection. Connect to a parallel resonant fundamental crystal or input clock.
Crystal connection. Connect to a crystal or leave unconnected for clock.
Connect to ground.
VCO divider word input pins determined by user. Forms a binary number from 0 to
511.
Power-down. Active low. Turns off entire chip when low. Clock outputs tri-stated.
Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency.
Reference output. Buffered crystal oscillator (or clock ) output.
R4
R3
R2
R1
R0
VDD
REF
CLK
GND
PD
V8
V7
V6
V5
2
Pin Description
ICS525-01/02/11/12 REV S 042407
CLOCK MULTIPLIER

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