ICS525R-11LF IDT, Integrated Device Technology Inc, ICS525R-11LF Datasheet - Page 7

• Manufacturer Part Number: ICS525R-11LF
• Description: IC PECL CLK USER CONFIG 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of ICS525R-11LF

• Pll: Yes with Bypass
• Input: Clock, Crystal
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 40MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 40MHz
• Number Of Elements: 1
• Supply Current: 6mA
• Pll Input Freq (min): 2MHz
• Pll Input Freq (max): 50MHz
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: QSOP
• Output Frequency Range: 0.75 to 40MHz
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Pin Count: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 525R-11LF

IDT™ / ICS™ USER CONFIGURABLE CLOCK
ICS525-01/02/11/12
USER CONFIGURABLE CLOCK
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V
Short Circuit Current
Input Capacitance
On-chip Pull-up Resistor
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle, OD =
2, 4, 6, 8, or 10
Output Clock Duty Cycle, OD =
3, 5, 7, or 9
Output Clock Duty Cycle, OD =
1 (-02 and -12 only)
Power-down Time, PD low to
clocks stopped
Power-up Time, PD high to
clocks stable
Absolute Clock Period Jitter,
ICS525-01, Note 2
One Sigma Clock Period Jitter,
ICS525-01, Note 2
Absolute Clock Period Jitter,
ICS525-02, Note 2
One Sigma Clock Period Jitter,
ICS525-02, Note 2
Absolute Clock Period Jitter,
ICS525-11, Note 2
One Sigma Clock Period Jitter,
ICS525-11, Note 2
Absolute Clock Period Jitter,
ICS525-12, Note 2
One Sigma Clock Period Jitter,
ICS525-12, Note 2
Parameter
Parameter
Symbol
R
C
PU
Symbol
IN
F
t
t
t
t
t
t
t
t
ja
js
ja
js
ja
js
ja
js
IN
CLK and REF outputs
V, R, S pins and pin 19
V, R, S pins and pin 19
Crystal input
Clock input
0.8 to 2.0 V
2.0 to 0.8 V
At VDD/2
At VDD/2
At VDD/2
Deviation from mean
One Sigma
Deviation from mean
One Sigma
Deviation from mean
One Sigma
Deviation from mean
One Sigma
Conditions
7
Conditions
Min.
Min.
45
40
35
5
2
Typ.
±55
270
4
Typ.
49 to
±140
±160
±160
ICS525-01/02/11/12 REV S 042407
±85
51
45
30
40
40
1
1
CLOCK MULTIPLIER
Max.
Max.
27
50
55
60
65
50
10
Units
Units
MHz
MHz
mA
pF
k
ms
ns
ns
ns
ps
ps
ps
ps
ps
ps
ps
ps
%
%