IDT2308A-5HDCI IDT, Integrated Device Technology Inc, IDT2308A-5HDCI Datasheet - Page 3
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IDT2308A-5HDCI
Manufacturer Part Number
IDT2308A-5HDCI
Description
IC CLOCK MULT ZD HI DRV 16-SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Type
Multiplier, Zero Delay Bufferr
Datasheet
1.IDT2308A-1HDCG8.pdf
(10 pages)
Specifications of IDT2308A-5HDCI
Pll
Yes with Bypass
Input
LVTTL
Output
LVTTL
Number Of Circuits
1
Ratio - Input:output
1:8
Differential - Input:output
No/No
Frequency - Max
133MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC
Frequency-max
133MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
2308A-5HDCI
FUNCTION TABLE
NOTE:
1. H = HIGH Voltage Level
AVAILABLE OPTIONS FOR IDT2308A
NOTE:
1. Output phase is indeterminant (0° or 180° from input clock).
ZERO DELAY AND SKEW CONTROL
will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust
the input-output delay.
loaded equally, for zero output-output skew.
IDT2308A
3.3V ZERO DELAY CLOCK MULTIPLIER
To close the feedback loop of the IDT2308A, the FBK pin can be driven from any of the eight available output pins. The output driving the FBK pin
For applications requiring zero input-output delay, all outputs including the one providing feedback should be equally loaded. Ensure the outputs are
L = LOW Voltage Level
IDT2308A-1H
IDT2308A-2H
IDT2308A-2H
IDT2308A-1
IDT2308A-2
IDT2308A-2
IDT2308A-3
IDT2308A-3
IDT2308A-4
S2
Device
H
H
L
L
S1
H
H
L
L
(1)
SELECT INPUT DECODING
Bank A or Bank B
Bank A or Bank B
Bank A or Bank B
Feedback From
Bank A
Bank B
Bank A
Bank B
Bank A
Bank B
Tri-State
CLK A
Driven
Driven
Driven
3
Tri-State
Tri-State
CLK B
Driven
Driven
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
Bank A Frequency
2 x Reference
2 x Reference
2 x Reference
4 x Reference
2 x Reference
Reference
Reference
Reference
Reference
Output Source
REF
PLL
PLL
PLL
Reference or Reference
Bank B Frequency
2 x Reference
2 x Reference
Reference/2
Reference/2
Reference
Reference
Reference
Reference
PLL Shut Down
Y
N
Y
N
(1)