IDT5V49EE702NDGI8 IDT, Integrated Device Technology Inc, IDT5V49EE702NDGI8 Datasheet - Page 13

IC PLL CLK GEN 200MHZ 28VQFN

IDT5V49EE702NDGI8

Manufacturer Part Number
IDT5V49EE702NDGI8
Description
IC PLL CLK GEN 200MHZ 28VQFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generator, Multiplexerr
Datasheet

Specifications of IDT5V49EE702NDGI8

Pll
Yes with Bypass
Input
LVCMOS, LVTTL, Crystal
Output
HCSL, LVCMOS, LVDS, LVPECL, LVTTL
Number Of Circuits
1
Ratio - Input:output
2:7
Differential - Input:output
No/Yes
Frequency - Max
500MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
500MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IDT5V49EE702DLGI8
IDT5V49EE702DLGI8
Each frame starts with a “Start Condition” and ends with an
“End Condition”. These are both generated by the Master
device.
External I
Progwrite
Writes can continue as long as a Stop condition is not sent and each byte will increment the register address.
IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR
R/W
0 – Slave will be written by master
1 – Slave will be read by master
The first byte transmitted by the Master is the Slave Address followed by the R/W bit.
The Slave acknowledges by sending a “1” bit.
S
IDT5V49EE702
EEPROM PROGRAMMABLE CLOCK GENERATOR
KEY:
SYMBOLS:
Address
7-bits
2
First Byte Transmitted on I
MSB
C Interface Condition
From Master to Slave
From Master to Slave, but can be omitted if followed by the correct sequence
Normally, data transfer is terminated by a STOP condition generated by the Master. However, if the Master still wishes to communicate on the bus, it can
generate a separate START condition, and address another Slave address without first generating a STOP condition.
From Slave to Master
ACK - Acknowledge (SDAT LOW)
NACK – Not Acknowledge (SDAT HIGH)
SR – Repeated Start Condition
S – START Condition
P – STOP Condition
1
1
R/W
0
7-bit slave address
0
ACK
1-bit
1
0
Command Code
8-bits: xxxx xx00
1
2
C Bus
0
LSB
R/W
Progwrite Command Frame
ACK from Slave
ACK
1-bit
13
Register
8-bits
ACK
1-bit
8-bits
Data
ACK
1-bit
IDT5V49EE702
CLOCK SYNTHESIZER
P
REV F 022310

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